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path: root/drivers/gpu/drm/nouveau/nvc0_pm.c
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2013-11-08drm/nouveau/drm/pm: remove everything except the hwmon interfaces to THERMBen Skeggs1-599/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/fb: initialise vram controller as pfb sub-objectBen Skeggs1-4/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau: port remainder of drm code, and rip out compat layerBen Skeggs1-77/+97
v2: Ben Skeggs <bskeggs@redhat.com> - fill in nouveau_pm.dev to prevent oops - fix ppc issues (build + OF shadow) Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau/fb: merge fb/vram and port to subdev interfacesBen Skeggs1-6/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau/clock: pull in the implementation from all over the placeBen Skeggs1-2/+2
Still missing the main bits we use to change performance levels, I'll get to it after all the hard yakka has been finished. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau: restructure source tree, split core from drm implementationBen Skeggs1-1/+1
Future work will be headed in the way of separating the policy supplied by the nouveau drm module from the mechanisms provided by the driver core. There will be a couple of major classes (subdev, engine) of driver modules that have clearly defined tasks, and the further directory structure change is to reflect this. No code changes here whatsoever, aside from fixing up a couple of include file pathnames. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-08-14nouveau: fixup scanout enable in nvc0_pmMaarten Lankhorst1-1/+1
Fixes screen being black after changing performance level. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Cc: stable@vger.kernel.org [3.5+] Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nvc0/pm: very initial mclk freq changeBen Skeggs1-1/+23
Loads of magic missing, this will probably blow up if you try it. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nvc0/pm: enable mpll src pll, and calc mpll coefficientsBen Skeggs1-0/+51
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nvc0/pm: start filling in memory reclocking stubsBen Skeggs1-0/+116
2012-03-13drm/nvc0/pm: restrict pll mode to clocks that can actually use itBen Skeggs1-1/+1
Fixes reclocking failure on some chips where we attempted to set PDAEMON to PLL mode. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nvc0/pm: initial engine reclockingBen Skeggs1-0/+237
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvc0/pm: minor clock readback fixesBen Skeggs1-2/+6
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvc0/pm: more complete parsing of clock domainsBen Skeggs1-0/+6
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvc0/pm: initial implementation of clocks_get()Ben Skeggs1-0/+145
Not too certain on memory clock yet, but it gets the right numbers for each perflvl on my NVC0. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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