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path: root/drivers/gpu/drm/nouveau/nv04_fifo.c
AgeCommit message (Expand)AuthorFilesLines
2012-05-24drm/nouveau/fifo: turn all fifo modules into engine modulesBen Skeggs1-186/+181
2012-05-24drm/nouveau/fifo: remove all the "special" engine hooksBen Skeggs1-46/+14
2011-03-14drm/nv50: check for vm traps on every gr irqBen Skeggs1-1/+1
2011-02-24drm/nouveau: decode PFIFO DMA_PUSHER error codesMarcin Slusarz1-3/+14
2010-12-08drm/nouveau: make fifo.create_context() responsible for mapping control regsBen Skeggs1-0/+9
2010-12-03drm/nouveau: move PFIFO ISR into nv04_fifo.cBen Skeggs1-0/+206
2010-12-03drm/nouveau: Refactor context destruction to avoid a lock ordering issue.Francisco Jerez1-2/+19
2010-12-03drm/nouveau: add more fine-grained locking to channel list + structuresBen Skeggs1-2/+2
2010-09-24drm/nouveau: Simplify tile region handling.Francisco Jerez1-25/+20
2010-09-24drm/nouveau: tidy ram{ht,fc,ro} a bitBen Skeggs1-5/+6
2010-09-24drm/nouveau: remove nouveau_gpuobj_ref completely, replace with sanityBen Skeggs1-7/+5
2010-09-24drm/nouveau: modify object accessors, offset in bytes rather than dwordsBen Skeggs1-4/+4
2010-07-13drm/nv04: Enable context switching on PFIFO init.Francisco Jerez1-0/+1
2010-07-13drm/nouveau: add instmem flush() hookBen Skeggs1-8/+0
2010-07-13drm/nouveau: Fix a couple of sparse warnings.Francisco Jerez1-4/+7
2010-02-25drm/nouveau: protect channel create/destroy and irq handler with a spinlockMaarten Maathuis1-0/+5
2010-01-11drm/nouveau: Add cache_flush/pull fifo engine functions.Francisco Jerez1-0/+34
2009-12-11drm/nouveau: Add DRM driver for NVIDIA GPUsBen Skeggs1-0/+271
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