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path: root/drivers/gpu/drm/i915
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2021-03-29drm/i915/selftest: Fix debug message in igt_vma_remapped_gtt()Imre Deak1-1/+1
The expected/found values were swapped in a debug message, fix this up. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-4-imre.deak@intel.com
2021-03-29drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt()Imre Deak1-1/+1
An inner scope version of err shadows the variable in the outer scope, and err doesn't get set after a failure, fix these. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-3-imre.deak@intel.com
2021-03-29drm/i915: Fix rotation setup during plane HW readoutImre Deak1-6/+3
The HW plane state is cleared and inited after we store the rotation to it, so store it instead to the uapi state to match what we do with all other plane state until intel_plane_copy_uapi_to_hw_state() is called. Rotation for initial FBs is not supported atm, but let's still fix the plane state setup here. While at it remove the redundant intel_state->uapi.src/dst init, which will be done in intel_plane_copy_uapi_to_hw_state(). v2: Remove redundant intel_state->uapi.src/dst init. (Ville) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325214808.2071517-2-imre.deak@intel.com
2021-03-29drm/i915: Remove repeated declarationWan Jiabing3-3/+0
struct drm_i915_private, struct intel_crtc_state and struct intel_crtc is declared twice. Remove the duplicate. Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210326012527.875026-1-wanjiabing@vivo.com
2021-03-29drm/i915: Stop adding planes to the commit needlesslyVille Syrjälä1-8/+2
The dbuf bandwidth calculations don't need the planes to be added to the state. Each plane's data rate has already been precalculated and stored in the crtc state, and that with the dbuf slice usage for each plane is all the dbuf bandwidth code needs to figure out what the minimum cdclk is. What we're trying to do here is make sure each plane recalculates its minimum cdclk (ie. plane->min_cdclk()) on those platforms where the number of active planes affects the result of said calculation. Nothing to do with any dbuf cdclk requirements. Not sure if we had stuff in slightly different order or what, but at least in the current scheme this is not necessary. Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325004415.17432-2-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
2021-03-29drm/i915: rename i915_rev_steppings->intel_step_infoJani Nikula3-8/+8
Matter of taste. Match the prefix for everything else related to steppings. No functional changes. Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/d3ba7c448e596fd2425a29bcc7ea8493505a30f9.1616764798.git.jani.nikula@intel.com
2021-03-29drm/i915: rename disp_stepping->display_step and gt_stepping->gt_stepJani Nikula3-28/+28
Matter of taste. Step matches the enums. Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1724c8bde0e0f596240437d72ace60b9c34ae9db.1616764798.git.jani.nikula@intel.com
2021-03-29drm/i915: rename DISP_STEPPING->DISPLAY_STEP and GT_STEPPING->GT_STEPJani Nikula7-16/+16
Matter of taste. STEP matches the enums. Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/cf2dccd1c9c7fdcf5de08ea10a9265292b45d8c7.1616764798.git.jani.nikula@intel.com
2021-03-29drm/i915: switch TGL and ADL to the new stepping schemeJani Nikula3-56/+28
This changes the way revids not present in the array are handled: - For gaps in the array, the next present revid is used. - For revids beyond the array, the new STEP_FUTURE is used instead of the last revid in the array. In both cases, we'll get debug logging of what's going on. v2: Rename stepping->step Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/756fe3d75b1e91ef812fc1fd3f70337e9c571d91.1616764798.git.jani.nikula@intel.com
2021-03-29drm/i915: switch KBL to the new stepping schemeJani Nikula7-37/+82
Add new symbolic names for revision ids, and convert KBL revids to use them via the new stepping check macros. This also fixes theoretical out of bounds access to kbl_revids array. v3: upgrade dbg to warn on unknown revid (José) v2: Rename stepping->step Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/79b6c48211c6b214165391d350d556bad748f747.1616764798.git.jani.nikula@intel.com
2021-03-29drm/i915: add new helpers for accessing stepping infoJani Nikula3-9/+29
Add new runtime info field for stepping. Add new helpers for accessing them. As we'll be switching platforms over to the new scheme incrementally, check for non-initialized steppings. In case a platform does not have separate display and gt steppings, it's okay to use a common shorthand. However, in this case the display stepping must not be initialized, and gt stepping is the single point of truth. v3: Remove IS_STEP() (José) v2: Rename stepping->step Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/bb4275733fa390ea3dbf6f62794d55b616665230.1616764798.git.jani.nikula@intel.com
2021-03-29drm/i915: split out stepping info to a new fileJani Nikula5-56/+74
gt/intel_workarounds.c is decidedly the wrong place for handling stepping info. Add new intel_step.[ch] for the data, and move the stepping arrays there. No functional changes. v2: Rename stepping->step Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f69baf82819a8a35815fca25a520de5c38a7e1b5.1616764798.git.jani.nikula@intel.com
2021-03-26drm/i915: add gem/gt TODODaniel Vetter1-0/+41
We've discussed a bit how to get the gem/gt team better integrated and collaborate more with the wider community and agreed to the following: - all gem/gt patches are reviewed on dri-devel for now. That's overkill, but in the past there was definitely too little of that. - i915-gem folks are encouraged to cross review core patches from other teams - big features (especially uapi changes) need to be discussed in an rfc patch that documents the interface and big picture design, before we get lost in the details of the code - Also a rough TODO (can be refined as we go ofc) to get gem/gt back on track, like we've e.g. done with DAL/DC to get that in shape. v2: - add dma_fence annotations (Dave) - tasklet helpers (Jani on irc) There was also a discussion about moving these into gitlab issues, or gitlab issues as additional discussion place at least. For now it's just the TODO file Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Jason Ekstrand <jason@jlekstrand.net> Cc: Dave Airlie <airlied@redhat.com> Acked-by: Dave Airlie <airlied@redhat.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210324211041.1354941-1-daniel.vetter@ffwll.ch
2021-03-26drm/i915: Fix transposed arguments to skl_plane_wm_level()Ville Syrjälä1-2/+2
Accidentally transposed the arguments to skl_plane_wm_level() which is causing us to mistakenly think that the plane watermarks have/have not changed when the opposite may be true. Swap the arguments so this actually works. The other uses of this look OK. Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Fixes: 2871b2fde449 ("drm/i915: Fix TGL+ plane SAGV watermark programming") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210325004415.17432-1-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
2021-03-26drm/i915: Allow configuring default request expiry via modparamTvrtko Ursulin3-2/+9
Module parameter is added (request_timeout_ms) to allow configuring the default request/fence expiry. Default value is inherited from CONFIG_DRM_I915_REQUEST_TIMEOUT. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210324121335.2307063-8-tvrtko.ursulin@linux.intel.com
2021-03-26drm/i915: Fail too long user submissions by defaultTvrtko Ursulin4-1/+66
A new Kconfig option CONFIG_DRM_I915_REQUEST_TIMEOUT is added, defaulting to 20s, and this timeout is applied to all users contexts using the previously added watchdog facility. Result of this is that any user submission will simply fail after this timeout, either causing a reset (for non-preemptable), or incomplete results. This can have an effect that workloads which used to work fine will suddenly start failing. Even workloads comprised of short batches but in long dependency chains can be terminated. And because of lack of agreement on usefulness and safety of fence error propagation this partial execution can be invisible to userspace even if it is "listening" to returned fence status. Another interaction is with hangcheck where care needs to be taken timeout is not set lower or close to three times the heartbeat interval. Otherwise a hang in any application can cause complete termination of all submissions from unrelated clients. Any users modifying the per engine heartbeat intervals therefore need to be aware of this potential denial of service to avoid inadvertently enabling it. Given all this I am personally not convinced the scheme is a good idea. Intuitively it feels object importers would be better positioned to enforce the time they are willing to wait for something to complete. v2: * Improved commit message and Kconfig text. * Pull in some helper code from patch which got dropped. v3: * Bump timeout to 20s to see if it helps Tigerlake. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210324121335.2307063-7-tvrtko.ursulin@linux.intel.com
2021-03-26drm/i915: Request watchdog infrastructureTvrtko Ursulin8-0/+106
Prepares the plumbing for setting request/fence expiration time. All code is put in place but is never activated due yet missing ability to actually configure the timer. Outline of the basic operation: A timer is started when request is ready for execution. If the request completes (retires) before the timer fires, timer is cancelled and nothing further happens. If the timer fires request is added to a lockless list and worker queued. Purpose of this is twofold: a) It allows request cancellation from a more friendly context and b) coalesces multiple expirations into a single event of consuming the list. Worker locklessly consumes the list of expired requests and cancels them all using previous added i915_request_cancel(). Associated timeout value is stored in rq->context.watchdog.timeout_us. v2: * Log expiration. v3: * Include more information about user timeline in the log message. v4: * Remove obsolete comment and fix formatting. (Matt) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210324121335.2307063-6-tvrtko.ursulin@linux.intel.com
2021-03-26drm/i915: Handle async cancellation in sentinel assertTvrtko Ursulin1-4/+8
With the watchdog cancelling requests asynchronously to preempt-to-busy we need to relax one assert making it apply only to requests not in error. v2: * Check against the correct request! v3: * Simplify the check to avoid the question of when to sample the fence error vs sentinel bit. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210324121335.2307063-5-tvrtko.ursulin@linux.intel.com
2021-03-26drm/i915: Restrict sentinel requests furtherTvrtko Ursulin1-1/+1
Disallow sentinel requests follow previous sentinels to make request cancellation work better when faced with a chain of requests which have all been marked as in error. Because in cases where we end up with a stream of cancelled requests we want to turn off request coalescing so they each will get individually skipped by the execlists_schedule_in (which is called per ELSP port, not per request). Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> [danvet: Fix typo in the commit message that Matthew spotted.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210324121335.2307063-4-tvrtko.ursulin@linux.intel.com
2021-03-26drm/i915: Individual request cancellationChris Wilson5-6/+242
Currently, we cancel outstanding requests within a context when the context is closed. We may also want to cancel individual requests using the same graceful preemption mechanism. v2 (Tvrtko): * Cancel waiters carefully considering no timeline lock and RCU. * Fixed selftests. v3 (Tvrtko): * Remove error propagation to waiters for now. v4 (Tvrtko): * Rebase for extracted i915_request_active_engine. (Matt) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> [danvet: Resolve conflict because intel_engine_flush_scheduler is still called intel_engine_flush_submission] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210324121335.2307063-3-tvrtko.ursulin@linux.intel.com
2021-03-26drm/i915: Extract active lookup engine to a helperTvrtko Ursulin3-33/+49
Move active engine lookup to exported i915_request_active_engine. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> [danvet: Slight rebase, engine->sched.lock is still called engine->active.lock.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210324121335.2307063-2-tvrtko.ursulin@linux.intel.com
2021-03-25drm/i915: Use tasklet_unlock_spin_wait() in __tasklet_disable_sync_once()Sebastian Andrzej Siewior1-1/+1
The i915 driver has its own tasklet interface which was overseen in the tasklet rework. __tasklet_disable_sync_once() is a wrapper around tasklet_unlock_wait(). tasklet_unlock_wait() might sleep, but the i915 wrappers invokes it from non-preemtible contexts with bottom halves disabled. Use tasklet_unlock_spin_wait() instead which can be invoked from non-preemptible contexts. Fixes: da044747401fc ("tasklets: Replace spin wait in tasklet_unlock_wait()") Reported-by: kernel test robot <oliver.sang@intel.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20210323092221.awq7g5b2muzypjw3@flow
2021-03-24drm/i915/gt: Always flush the submission queue on checking for idleChris Wilson1-8/+2
We check for idle during debug prints and other debugging actions. Simplify the flow by not touching execlists state. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210205174358.28465-1-chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/selftest: Synchronise with the GPU timestampChris Wilson1-3/+5
Wait for the GPU to wake up from the semaphore before measuring the time, so that we coordinate the sampling on both the CPU and GPU for more accurate comparisons. v2: Switch to local_irq_disable() as once suggested by Mika. Reported-by: Bruce Chang <yu.bruce.chang@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: CQ Tang <cq.tang@intel.com> Reviewed-by: Bruce Chang <yu.bruce.chang@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210205112912.22978-1-chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915: give stolen system memory its own classMatthew Auld5-10/+10
In some future patches we will need to also support a stolen region carved from device local memory, on platforms like DG1. To handle this we can simply describe each in terms of its own memory class. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210205102026.806699-2-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915: cleanup the region class/instance encodingMatthew Auld2-20/+24
Get rid of the strange REGION_MAP encoding stuff and just use an explicit class/instance pair for each region. This better matches our future uAPI where all queryable regions are identified with a u16 class and u16 instance. v2: fix whitespace Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210205102026.806699-1-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/gt: Double check heartbeat timeout before resettingChris Wilson1-1/+10
Check that we have actually passed the heartbeat interval since last checking the request before resetting the device. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2780 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210204211303.21347-2-chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/selftests: Restore previous heartbeat intervalChris Wilson1-4/+10
Use the defaults we store on the engine when resetting the heartbeat as we may have had to adjust it from the config value during initialisation. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210204211303.21347-1-chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/gtt/dg1: add PTE_LM plumbing for GGTTMatthew Auld2-6/+22
For the PTEs we get an LM bit, to signal whether the page resides in SMEM or LMEM. Based on a patch from Michel Thierry. BSpec: 45015 Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210203171231.551338-3-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/gtt/dg1: add PTE_LM plumbing for ppGTTMatthew Auld3-1/+18
For the PTEs we get an LM bit, to signal whether the page resides in SMEM or LMEM. BSpec: 45040 v2: just use gen8_pte_encode for dg1 Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210203171231.551338-2-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915: Distinction of memory regionsZbigniew Kempczyński2-2/+2
In preparation for Xe HP multi-tile architecture with multiple memory regions, we need to be able differentiate multiple instances of device local-memory. Note that the region name is just to give it a human friendly identifier, instead of using class/instance which also uniquely identifies the region. So far the region name is only for our own internal debugging in the kernel(like in the selftests), or debugfs which prints the list of regions, including the regions name. v2: add commentary for our current region name use Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210203171231.551338-1-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/gt: Retire unexpected starting state error dumpingChris Wilson1-20/+0
We have not seen an occurrence of the false restart state recenty, and if we did see such an event from inside engine-reset, it would deadlock on trying to suspend the tasklet to read the register state (from inside the tasklet). Instead, we inspect the context state before submission which will alert us to any issues prior to execution on HW. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Andi Shyti <andi.shyti@intel.com> Reviewed-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210201164222.14455-1-chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/selftests: Use a single copy of the mocs tableChris Wilson1-10/+22
Instead of copying the whole table to each category (mocs, l3cc), use a single table with a pointer to it if the category is enabled. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210201100448.9802-1-chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915: Protect against request freeing during cancellation on wedgingChris Wilson6-24/+31
As soon as we mark a request as completed, it may be retired. So when cancelling a request and marking it complete, make sure we first keep a reference to the request. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210201085715.27435-4-chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915: allocate cmd ring in lmemMichel Thierry1-2/+3
Prefer allocating the cmd ring from LMEM on dgfx. Signed-off-by: Michel Thierry <michel.thierry@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210127131417.393872-8-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915: move engine scratch to LMEMMatthew Auld1-2/+6
Prefer allocating the engine scratch from LMEM on dgfx. v2: flatten the chain Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210127131417.393872-7-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915: allocate context from LMEMMatthew Auld1-1/+5
Prefer allocating the context from LMEM on dgfx. Based on a patch from Michel Thierry. v2: flatten the chain Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210127131417.393872-6-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/dg1: Reserve first 1MB of local memoryImre Deak1-0/+41
On DG1 A0/B0 steppings the first 1MB of local memory must be reserved. One reason for this is that the 0xA0000-0xB0000 range is not accessible by the display, probably since this region is redirected to another memory location for legacy VGA compatibility. BSpec: 50586 Testcase: igt/kms_big_fb/linear-64bpp-rotate-0 v2: - Reserve the memory on B0 as well. v3: replace DRM_DEBUG/DRM_ERROR with drm_dbg/drm_err v4: fix the insanity Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210127131417.393872-5-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915: introduce mem->reservedAbdiel Janulgue3-0/+96
In the following patch we need to reserve regions unaccessible to the driver during initialization, so add mem->reserved for collecting such regions. v2: turn into an actual intel_memory_region_reserve api Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210127131417.393872-4-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915: reserve stolen for LMEM regionCQ Tang2-4/+12
The lmem region needs to remove the stolen part, which should just be a case of snipping it off the end. Signed-off-by: CQ Tang <cq.tang@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210127131417.393872-3-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915: setup the LMEM regionMatthew Auld3-1/+41
Hook up the LMEM region. Addresses will start from zero, and for CPU access we get LMEM_BAR which is just a 1:1 mapping of said region. Based on a patch from Michel Thierry. v2 by Jani: - use intel_uncore_read/intel_uncore_write - remove trailing blank line v3: s/drm_info/drm_dbg for info which in non-pertinent for the user Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210127131417.393872-2-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915: make local-memory probing a GT operationMatthew Auld6-7/+49
Device local memory is very much a GT thing, therefore it should be the responsibility of the GT to setup the device local memory region. Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210127131417.393872-1-matthew.auld@intel.com [danvet: Rebase conflict.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/gt: use new tasklet API for execution listEmil Renner Berthing4-23/+23
This converts the driver to use the new tasklet API introduced in commit 12cc923f1ccc ("tasklet: Introduce new initialization API") v2: Fix up selftests/execlists. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210126150155.1617-1-kernel@esmil.dk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/buddy: document the unused header bitsMatthew Auld3-2/+56
The largest possible order is (63-PAGE_SHIFT), given that our min chunk size is PAGE_SIZE. With that we should only need at most 6 bits to represent all possible orders, giving us back 4 bits for other potential uses. Include a simple selftest to verify this. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210126103019.177622-1-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/gt: Move the defer_request waiter active assertionChris Wilson1-1/+1
In defer_request() we start with the request we just unsubmitted (that should be the active request on the gpu) and then defer all of its waiters. No waiter should be ahead of the active request, so none should be marked as active. That assert failed. Of particular note this machine was undergoing persistent GPU resets due to underlying HW issues, so that may be a clue. A request is also marked as active when it is retired, regardless of current queue status, and so this assertion failure may be a result of the queue being completed by the reset and then subsequently processed by the tasklet. We can filter out retired requests here by doing the assertion check after the is-ready check (active is a subset of being ready). Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2978 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210125140136.10494-2-chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/selftests: Check for engine-reset errors in the middle of workaroundsChris Wilson1-3/+13
As we reset the engine between verifying the workarounds remain intact, report an engine reset failure. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210125140136.10494-1-chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/gem: consolidate 2big error checking for object sizesMatthew Auld4-34/+29
Throw it into a simple helper, and throw a warning if we encounter an object which has been initialised with an object size that exceeds our limit of INT_MAX pages. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210122181514.541436-2-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/gem: don't trust the dma_buf->sizeMatthew Auld1-0/+10
At least for the time being, we need to limit our object sizes such that the number of pages can fit within a 32b signed int. It looks like we should also apply the same restriction to any imported dma-buf. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20210122181514.541436-1-matthew.auld@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/gt: Replace 'return' with a fall-throughChris Wilson1-3/+3
Checkpatch worries that the 'return' before an else clause might be redundant. In this case, it is avoiding hitting the MISSING_CASE() warning. Let us appease checkpatch by falling through to the end of the function, which typically means that we then clean up the unused wa_list. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210122192913.4518-10-chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-03-24drm/i915/gt: Add a space before '('Chris Wilson1-1/+1
Checkpatch noticed a while(0) and complains about the lack of space. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210122192913.4518-9-chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-28 20:36:28 +0300