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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)AuthorFilesLines
2017-07-03drm/i915/cnl: Fix the CURSOR_COEFF_MASK used in DDI Vswing ProgrammingNavare, Manasi D1-1/+1
2017-06-26drm/i915/cnl: Fix RMW on ddi vswing sequence.Rodrigo Vivi1-0/+9
2017-06-14drm/i915/perf: Add OA unit support for Gen 8+Robert Bragg1-0/+22
2017-06-12drm/i915/cnl: Implement voltage swing sequence.Rodrigo Vivi1-0/+1
2017-06-12drm/i915/cnl: Add registers related to voltage swing sequences.Rodrigo Vivi1-0/+140
2017-06-12drm/i915: Add MMIO helper for 6 ports with different offsets.Rodrigo Vivi1-0/+3
2017-06-12drm/i915/cnl: Initialize PLLsRodrigo Vivi1-0/+48
2017-06-12drm/i915/cnl: DDI - PLL mappingRodrigo Vivi1-0/+9
2017-06-12drm/i915/cnl: Implement CNL display init/unit sequenceVille Syrjälä1-0/+23
2017-06-12drm/i915/cnl: Implement .get_display_clock_speed() for CNLVille Syrjälä1-0/+5
2017-06-07drm/i915: Remove unnecessary PORT3 definition.Rodrigo Vivi1-4/+2
2017-06-07drm/i915/cnl: Add power wells for CNLVille Syrjälä1-0/+5
2017-06-06drm/i915: Implement fbc_status "Compressing" info for all platformsVille Syrjälä1-5/+5
2017-06-02drm/i915/cnp: add CNP gmbus supportRodrigo Vivi1-1/+2
2017-06-02drm/i915/cnp: Get/set proper Raw clock frequency on CNP.Rodrigo Vivi1-0/+5
2017-05-30drm/i915: Remove decoupled MMIO codeKai Chen1-7/+0
2017-05-18drm/i915: Fix new -Wint-in-bool-context gcc compiler warningHans de Goede1-1/+1
2017-05-10drm/i915: Support variable cursor height on ivb+Ville Syrjälä1-1/+4
2017-05-10drm/i915: Parametrize cursor/primary pipe select bitsVille Syrjälä1-5/+2
2017-05-05drm/i915: Fix rawclk readout for g4xVille Syrjälä1-3/+7
2017-04-28drm/i915: Sanitize engine context sizesJoonas Lahtinen1-10/+0
2017-04-11drm/i915: Classify the engines in class + instanceDaniele Ceraolo Spurio1-0/+8
2017-03-28drm/i915: enable scramblingShashank Sharma1-0/+7
2017-03-16drm/i915: Use ktime to calculate rc0 residencyMika Kuoppala1-2/+0
2017-03-13drm/i915: Rename REDIRECT_TO_GUC bitChris Wilson1-1/+1
2017-03-09drm/i915: Initialize pm_intr_keep during intel_irq_init for GuCSagar Arun Kamble1-1/+2
2017-03-08Merge tag 'drm-intel-next-2017-03-06' of git://anongit.freedesktop.org/git/dr...Dave Airlie1-12/+90
2017-03-04drm/i915: Don't use enums for hardware engine idMichal Wajdeczko1-0/+6
2017-03-01drm/i915: Tighten mmio arrays for MIPI_PORTChris Wilson1-1/+1
2017-02-28drm/i915/glk: Program txesc clock divider for GLKDeepak M1-0/+5
2017-02-28drm/i915/glk: Add DSI PLL divider range for glkDeepak M1-0/+4
2017-02-28drm/i915/glk: Program new MIPI DSI PHY registers for GLKDeepak M1-0/+8
2017-02-27drm/i915/glk: Implement WaDDIIOTimeoutAnder Conselvan de Oliveira1-0/+5
2017-02-24Merge tag 'drm-for-v4.11-less-shouty' of git://people.freedesktop.org/~airlie...Linus Torvalds1-40/+448
2017-02-16drm/i915: Restore context and pd for ringbuffer submission after resetChris Wilson1-2/+4
2017-02-09drm/i915: Use the size/type of address space to make decisionsChris Wilson1-3/+0
2017-02-08drm/i915: Restore context and pd for ringbuffer submission after resetChris Wilson1-2/+4
2017-02-07drm/i915: Get correct display clock on 945gmArthur Heymans1-1/+1
2017-02-03drm/i915: Enable VLV audio chicken bit for LPE audioTakashi Iwai1-0/+3
2017-02-01drm/i915: add DisplayPort amp unmute for LPE audio modePierre-Louis Bossart1-0/+10
2017-02-01drm/i915: Add MIPI_IO WA and program DSI regulatorsUma Shankar1-0/+7
2017-01-30drm/i915: use variadic macros and arrays to choose port/pipe based registersJani Nikula1-6/+5
2017-01-30drm/i915: Create context desc template when context is createdMika Kuoppala1-0/+15
2017-01-30drm/i915/glk: Program pipe gamma and degamma tablesAnder Conselvan de Oliveira1-0/+14
2017-01-30drm/i915: Split broadwell_load_luts() into smaller functionsAnder Conselvan de Oliveira1-0/+1
2017-01-30drm/i915/glk: Plane color correction register changesAnder Conselvan de Oliveira1-1/+18
2017-01-25drm/i915: setup bridge for HDMI LPE audio driverJerome Anand1-0/+3
2017-01-13drm/i915/psr: report live PSR2 StateNagaraju, Vathsala1-0/+1
2017-01-13drm/i915/psr: set PSR_MASK bits for deep sleepNagaraju, Vathsala1-3/+7
2017-01-13drm/i915/psr: set CHICKEN_TRANS for psr2Nagaraju, Vathsala1-0/+6
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-19 00:38:24 +0300