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path: root/drivers/gpu/drm/i915/i915_reg.h
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2020-06-11Merge branch 'uaccess.i915' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds1-1/+1
2020-05-07drm/i915/gen12: Add aux table invalidate for all enginesMika Kuoppala1-0/+6
2020-05-07drm/i915/gen12: Invalidate aux table entries forciblyMika Kuoppala1-0/+2
2020-05-06drm/i915/icp: Add Wa_14010685332Matt Roper1-0/+1
2020-05-05drm/i915: Added required new PCode commandsStanislav Lisovskiy1-0/+4
2020-05-02i915: switch copy_perf_config_registers_or_number() to unsafe_put_user()Al Viro1-1/+1
2020-04-30drm/i915/selftests: Add tiled blits selftestZbigniew Kempczyński1-0/+2
2020-04-25drm/i915: Use indirect ctx bb to mend CMD_BUF_CCTLMika Kuoppala1-0/+1
2020-04-24drm/i915/gt: Use the RPM config register to determine clk frequenciesChris Wilson1-25/+0
2020-04-20drm/i915/selftests: Check RPS controlsChris Wilson1-0/+1
2020-04-20drm/i915: fix Sphinx build duplicate label warningJani Nikula1-2/+2
2020-04-18drm/i915/tc/tgl: Implement TC cold sequencesJosé Roberto de Souza1-0/+4
2020-04-18drm/i915/tc/icl: Implement TC cold sequencesJosé Roberto de Souza1-0/+1
2020-04-17drm/i915/display: Enable DP Display Audio WAUma Shankar1-0/+16
2020-04-16Merge tag 'topic/phy-compliance-2020-04-08' of git://anongit.freedesktop.org/...Joonas Lahtinen1-0/+18
2020-04-16drm/i915: Add YUV444 packed format support for skl+Stanislav Lisovskiy1-1/+1
2020-04-08drm/i915/dp: Register definition for DP compliance registerAnimesh Manna1-0/+18
2020-04-07drm/i915/gt: Yield the timeslice if caught waiting on a user semaphoreChris Wilson1-0/+1
2020-04-03drm/i915: Implement port sync for SKL+Ville Syrjälä1-0/+3
2020-03-28drm/i915/tgl: Add definitions for VRR registers and bitsAditya Swarup1-0/+90
2020-03-27drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2Ville Syrjälä1-6/+4
2020-03-20drm/i915/perf: Invalidate OA TLB on when closing perf streamUmesh Nerlige Ramappa1-0/+2
2020-03-18drm/i915/color: Extract icl_read_luts()Swati Sharma1-0/+6
2020-03-18drm/i915/perf: Invalidate OA TLB on when closing perf streamUmesh Nerlige Ramappa1-0/+2
2020-03-13drm/i915: Add Wa_1406306137:icl,ehlMatt Roper1-0/+1
2020-03-13drm/i915: Add Wa_1604278689:icl,ehlMatt Roper1-0/+1
2020-03-11drm/i915: Add missing HDMI audio pixel clocks for gen12Kai Vehmanen1-0/+4
2020-03-09drm/i915: Fix readout of PIPEGCMAXVille Syrjälä1-1/+0
2020-03-02drm/i915/tgl: Add Wa_1409085225, Wa_14010229206Matt Atwood1-0/+3
2020-03-02drm/i915/tgl: Implement Wa_1409804808José Roberto de Souza1-2/+3
2020-02-27drm/i915: Set up PIPE_MISC truncate bit on tgl+Ville Syrjälä1-0/+1
2020-02-27drm/i915: remove ICP_PP_CONTROLLucas De Marchi1-10/+0
2020-02-22drm/i915/tgl: Add Wa_22010178259:tglMatt Roper1-0/+1
2020-02-21drm/i915/tgl: Program MBUS_ABOX{1,2}_CTL during display initMatt Roper1-0/+2
2020-02-20drm/i915: Parametrize PFIT_PIPEVille Syrjälä1-0/+1
2020-02-08drm/i915/debugfs: Remove i915_energy_uJTvrtko Ursulin1-2/+0
2020-02-07drm/i915: Implement Wa_1607090982Mika Kuoppala1-0/+2
2020-02-07drm/i915: Disable tesselation clock gating on tgl A0Mika Kuoppala1-0/+1
2020-02-05drm/i915: Introduce parameterized DBUF_CTLStanislav Lisovskiy1-3/+3
2020-01-31drm/i915: Polish WM_LINETIME register stuffVille Syrjälä1-7/+7
2020-01-30drm/i915: add extra slice common debug registersLionel Landwerlin1-0/+2
2020-01-29drm/i915/gt: Hook up CS_MASTER_ERROR_INTERRUPTChris Wilson1-1/+4
2020-01-16drm/i915: add Wa_14010594013: icl,ehlMatt Atwood1-0/+1
2020-01-15drm/i915/tgl: Add Wa_1409825376 to tglRadhakrishna Sripada1-0/+3
2020-01-15drm/i915/gen11: Add additional pcode status valuesMatt Roper1-0/+2
2020-01-08drm/i915/display/icl+: Do not program clockgatingJosé Roberto de Souza1-20/+0
2020-01-07drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media ...Dhinakaran Pandiyan1-0/+1
2020-01-01drm/i915: Add Wa_1407352427:icl,ehlMatt Roper1-0/+1
2019-12-27drm/i915/tgl: Extend Wa_1408615072 to tglMatt Roper1-0/+3
2019-12-27drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehlMatt Roper1-1/+3
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