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path: root/drivers/gpu/drm/i915/gt/intel_lrc.c
AgeCommit message (Expand)AuthorFilesLines
2020-07-09drm/i915: Release shortlived maps of longlived objectsChris Wilson1-1/+1
2020-07-09drm/i915/gt: Replace opencoded i915_gem_object_pin_map()Chris Wilson1-6/+5
2020-07-08drm/i915/sseu: Move sseu_info under gt_infoVenkata Sandeep Dhanalakota1-1/+1
2020-06-16drm/i915/gt: Incrementally check for rewindingChris Wilson1-1/+20
2020-06-16drm/i915/gt: Prevent timeslicing into unpreemptable requestsChris Wilson1-0/+1
2020-06-15drm/i915/gt: Incorporate the virtual engine into timeslicingChris Wilson1-6/+24
2020-06-13drm/i915/execlists: Lift opportunistic process_csb to before engine lockChris Wilson1-7/+14
2020-06-10drm/i915/gt: Incrementally check for rewindingChris Wilson1-1/+20
2020-06-09drm/i915: Adjust the sentinel assert to match implementationTvrtko Ursulin1-11/+3
2020-06-05drm/i915/gt: Always check to enable timeslicing if not submittingChris Wilson1-3/+2
2020-06-05drm/i915/gt: Set timeslicing priority from queueChris Wilson1-1/+1
2020-06-04drm/i915/gt: Track if an engine requires forcewake w/aChris Wilson1-0/+4
2020-06-03drm/i915: Drop i915_request.i915 backpointerChris Wilson1-3/+3
2020-05-29drm/i915/gt: Start timeslice on partial submissionChris Wilson1-1/+3
2020-05-28drm/i915/gt: Prevent timeslicing into unpreemptable requestsChris Wilson1-0/+1
2020-05-26drm/i915/execlists: Shortcircuit queue_prio() for no internal levelsChris Wilson1-0/+3
2020-05-19drm/i915/gt: Incorporate the virtual engine into timeslicingChris Wilson1-6/+24
2020-05-19drm/i915/gt: Kick virtual siblings on timeslice outChris Wilson1-1/+1
2020-05-18drm/i915/gt: Reuse the tasklet priority for virtual as their siblingsChris Wilson1-2/+2
2020-05-14drm/i915/gt: Transfer old virtual breadcrumbs to irq_workerChris Wilson1-24/+10
2020-05-14drm/i915: Drop no-semaphore boostingChris Wilson1-9/+0
2020-05-13drm/i915: Mark the addition of the initial-breadcrumb in the requestChris Wilson1-1/+4
2020-05-13drm/i915/gt: Reset execlists registers before HWSPChris Wilson1-7/+14
2020-05-11drm/i915/gt: Restore Cherryview back to full-ppgttChris Wilson1-0/+54
2020-05-11drm/i915/gt: Mark up the racy read of execlists->context_tagChris Wilson1-1/+1
2020-05-09drm/i915: Replace zero-length array with flexible-arrayGustavo A. R. Silva1-1/+1
2020-05-08drm/i915/gt: Improve precision on defer_request assertChris Wilson1-1/+2
2020-05-07drm/i915/gen12: Add aux table invalidate for all enginesMika Kuoppala1-5/+81
2020-05-07drm/i915: Remove wait priority boostingChris Wilson1-3/+1
2020-05-07drm/i915: Mark concurrent submissions with a weak-dependencyChris Wilson1-0/+3
2020-05-07drm/i915/gen12: Invalidate aux table entries forciblyMika Kuoppala1-1/+15
2020-05-07drm/i915/gen12: Flush L3Mika Kuoppala1-0/+2
2020-05-07drm/i915/gen12: Fix HDC pipeline flushMika Kuoppala1-14/+15
2020-05-07Revert "drm/i915/tgl: Include ro parts of l3 to invalidate"Mika Kuoppala1-1/+0
2020-05-05drm/i915/gt: Stop holding onto the pinned_default_stateChris Wilson1-11/+3
2020-05-05drm/i915/execlists: Record the active CCID from before resetChris Wilson1-1/+3
2020-05-05drm/i915/gt: Small tidy of gen8+ breadcrumb emissionChris Wilson1-19/+15
2020-05-01drm/i915/gt: Make timeslicing an explicit engine propertyChris Wilson1-1/+4
2020-04-30drm/i915/gt: Always enable busy-stats for execlistsChris Wilson1-33/+11
2020-04-29drm/i915/gt: Keep a no-frills swappable copy of the default context stateChris Wilson1-19/+6
2020-04-29drm/i915/execlists: Verify we don't submit two identical CCIDsChris Wilson1-9/+28
2020-04-29drm/i915/execlists: Track inflight CCIDChris Wilson1-7/+22
2020-04-29drm/i915/execlists: Avoid reusing the same logical CCIDChris Wilson1-32/+25
2020-04-27drm/i915/gt: Sanitize GT firstChris Wilson1-0/+3
2020-04-27drm/i915/execlists: Check preempt-timeout target before submit_portsChris Wilson1-1/+1
2020-04-25drm/i915: Use indirect ctx bb to mend CMD_BUF_CCTLMika Kuoppala1-3/+109
2020-04-25drm/i915: Add per ctx batchbuffer wa for timestampMika Kuoppala1-12/+121
2020-04-25drm/i915: Add engine scratch register to live_lrc_fixedMika Kuoppala1-0/+12
2020-04-24drm/i915: Make define for lrc state offsetMika Kuoppala1-4/+4
2020-04-24drm/i915/selftests: Add context batchbuffers registers to live_lrc_fixedMika Kuoppala1-55/+73
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-03 06:46:03 +0300