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path: root/drivers/gpu/drm/i915/display/intel_display.c
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2022-07-12Merge tag 'drm-intel-next-2022-07-06' of git://anongit.freedesktop.org/drm/dr...Dave Airlie1-8/+22
2022-06-27drm/i915: Eliminate PIPECONF RMWs from .color_commit()Ville Syrjälä1-8/+22
2022-06-24Merge tag 'drm-intel-next-2022-06-22' of git://anongit.freedesktop.org/drm/dr...Dave Airlie1-1651/+165
2022-06-20drm/i915/display: convert modeset setup to struct drm_i915_private *i915Jani Nikula1-2/+2
2022-06-20drm/i915/display: split out hw state readout and sanitizeJani Nikula1-725/+14
2022-06-17drm/i915/display: some struct drm_i915_private *i915 conversionsJani Nikula1-30/+30
2022-06-17drm/i915/display: change who adds [] around crtc state dump context stringJani Nikula1-3/+3
2022-06-17drm/i915/display: split out crtc state dump to a separate fileJani Nikula1-309/+6
2022-06-17drm/i915/display: split out modeset verification codeJani Nikula1-235/+8
2022-06-17drm/i915/mpllb: move mpllb state check to intel_snps_phy.cJani Nikula1-45/+1
2022-06-17drm/i915/mpllb: use I915_STATE_WARN() for state mismatch warningsJani Nikula1-8/+6
2022-06-17drm/i915/dpll: move shared dpll state verification to intel_dpll_mgr.cJani Nikula1-92/+2
2022-06-17drm/i915/wm: move wm state verification to intel_pm.cJani Nikula1-121/+1
2022-06-16drm/i915: Sanitize underrun reporting before turning off any pipesVille Syrjälä1-2/+2
2022-06-16drm/i915: Extract intel_sanitize_fifo_underrun_reporting()Ville Syrjälä1-28/+37
2022-06-14drm/i915: Skip FDI vs. dotclock sanity check during readoutVille Syrjälä1-2/+0
2022-06-01drm/i915/display: stop using BUG()Jani Nikula1-8/+11
2022-05-31drm/i915: Check hw.enable and hw.active in intel_pipe_config_compare()Ville Syrjälä1-2/+4
2022-05-31drm/i915: Improve modeset debugsVille Syrjälä1-8/+14
2022-05-31drm/i915: s/pipe_config/crtc_state/Ville Syrjälä1-31/+31
2022-05-31drm/i915: Adjust intel_modeset_pipe_config() & co. calling conventionVille Syrjälä1-23/+25
2022-05-31drm/i915: Extract PIPE_CONF_CHECK_RECT()Ville Syrjälä1-10/+10
2022-05-31drm/i915: Extract PIPE_CONF_CHECK_TIMINGS()Ville Syrjälä1-27/+18
2022-05-27drm/i915/bios: Split VBT data into per-panel vs. global partsVille Syrjälä1-1/+0
2022-05-27drm/i915/bios: Split VBT parsing to global vs. panel specific partsVille Syrjälä1-0/+1
2022-05-11Merge tag 'drm-intel-next-2022-05-06' of git://anongit.freedesktop.org/drm/dr...Dave Airlie1-124/+52
2022-05-05drm/i915: Use drm_mode_init() for on-stack modesVille Syrjälä1-2/+3
2022-04-25drm/i915: Add crtc .crtc_get_shared_dpll()Ville Syrjälä1-0/+4
2022-04-25drm/i915: Move stuff into intel_dpll_crtc_compute_clock()Ville Syrjälä1-2/+1
2022-04-25drm/i915: Adjust .crtc_compute_clock() calling conventionVille Syrjälä1-1/+1
2022-04-25drm/i915: Remove pointless dpll_funcs checksVille Syrjälä1-4/+0
2022-04-25drm/i915: Pass dev_priv to intel_shared_dpll_init()Ville Syrjälä1-1/+1
2022-04-25drm: Rename dp/ to display/Thomas Zimmermann1-1/+1
2022-04-20drm/i915: Sanitize the port -> DDI/AUX power domain mapping for each platformImre Deak1-80/+5
2022-04-20drm/i915: Convert the u64 power well domains mask to a bitmapImre Deak1-31/+34
2022-04-20drm/i915: Rename the power domain names to end with pipes/portsImre Deak1-17/+17
2022-04-20drm/i915: Program i830 DPLL FP register laterVille Syrjälä1-3/+3
2022-04-13drm/i915/fbc: Introduce intel_fbc_sanitize()Ville Syrjälä1-0/+2
2022-04-13drm/i915/fbc: Remove intel_fbc_global_disable()Ville Syrjälä1-2/+0
2022-04-12drm/i915/dg2: Add support for DG2 clear color compressionJuha-Pekka Heikkilä1-1/+3
2022-03-30drm/i915/display/adlp: Fix programing of PIPE_MBUS_DBOX_CTLJosé Roberto de Souza1-40/+1
2022-03-30drm/i915/display/adlp: Adjust MBUS DBOX BW and B creditsCaz Yokoyama1-1/+4
2022-03-30drm/i915/display/tgl+: Set default values for all registers in PIPE_MBUS_DBOX...José Roberto de Souza1-3/+10
2022-03-30drm/i915: Move intel_vtd_active and run_as_guest to i915_utilsTvrtko Ursulin1-1/+7
2022-03-29drm/i915: Use DRM_MODE_FMT+DRM_MODE_ARG()Ville Syrjälä1-6/+6
2022-03-29drm/i915: Split color_commit() into noarm+arm pairVille Syrjälä1-6/+16
2022-03-29drm/i915: Make ilk+ pfit regiser unlockedVille Syrjälä1-9/+9
2022-03-22drm/i915: s/enable/active/ for DRRSVille Syrjälä1-2/+2
2022-03-21drm/i915: Pre-calculate plane relative data rateVille Syrjälä1-0/+5
2022-03-21drm/i915: Split plane data_rate into data_rate+data_rate_yVille Syrjälä1-0/+4
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