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path: root/drivers/gpu/drm/amd
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2017-10-21drm/amd/display: Program stream's csc matrix instead of using defaultSivapiriyanKumarasamy1-4/+3
Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: update link type to mst before topology discoveryWenjing Liu1-3/+3
[Description] link type is not updated before mst topology discovery. This causes issue when branch device response to link address after before the start topology discovery event finishes. [Solution] update link type to mst before topology discovery Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Use active + border for bw validationEric Yang1-3/+5
When doing SLS, KMD gives us clipped v_addressable with border. This results in bw validation failure. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Fixed incorrect return value for validatonYongqiang Sun1-4/+5
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: screen flickers when connected to ext monitor in cloneHersen Wu3-0/+12
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: version 3.1.02Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Fixed validation return wrong result.Yongqiang Sun3-3/+3
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: add hubp/dpp pg debug keyCharlene Liu1-0/+2
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: make sure BL off to mainlink off has enough timeCharlene Liu1-7/+0
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: fix ASSERT() caused by missing registers.Ken Chalmers1-19/+23
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: edp backlight regression fixYue Hin Lau2-0/+6
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: moving backlight registers to hwsequencerYue Hin Lau9-127/+158
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: update blending mode and set output denormEric Bernstein2-1/+30
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: add back removed hack for mpcc addEric Yang1-0/+12
A previous changed removed the hack to match mpcc_idd with mi instance. This causes pstate hang on resume from hibernate for yet unknown reason. Add the hack back for now to work around the issue. More debugging required in init_hw to root cause the hang. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: set cp25201 to use TPS4Wenjing Liu1-2/+14
[Description] hbr2 compliance eye output is unstable (toggling on and off) with debugger break. This caueses intermittent PHY automation failure. Need to look into the root cause later Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: removing remaining register definitions work aroundYue Hin Lau3-25/+23
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: power_down_Hw need signal type to turnoff backlightAndrew Jiang1-1/+4
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: make tile changing run at ISRShihChen Chen1-3/+18
Signed-off-by: ShihChen Chen <ShihChen.Chen@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Refactor dc_update_planes_and_stream.Bhawanpreet Lakha3-226/+87
Split update_planes_and_stream_state (split Software and Hardware programming) as the state is already build, so we only need to program the hardware Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Fix NULL pointer on MST chained modeJerry Zuo1-0/+7
Prevent NULL pointer on new_stream being added to ctx when added MST connectors cannot be found in existing crtc_state in the chained mode Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Exclude MST from fake sinkJerry Zuo1-2/+11
Needs effort to take care of the fake sink scenario in downstream daisy chain device. Exclude MST from fake sink feature for now. Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: fixing register includesYue Hin Lau2-45/+46
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Match actual state during S3 resume.Leo (Sunpeng) Li1-0/+36
During system suspend, we: 1. Cache a duplicate of the current DRM atomic state, which calls hooks to duplicate our internal states. 2. Call hooks to disable all functionalities. 3. System suspended. During resume, we attempt to restore the cached state. However, our interal states are now stale, since step 1 was done before step 2. i.e. our cached state does not reflect the disabled nature of things. This change resolves that by destroying all relevant states to reflect the actual state during resume. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: update mpc add/remove functionsEric Bernstein3-70/+130
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: fix multi-display on CZRoman Li1-8/+21
- fixed wrong index in dce110_validate_surface_sets() - formatted for better readability Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> igned-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Refactor dcn10_dpp_cm_helper to dcn10_cm_commonYue Hin Lau4-5/+5
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Don't report fake sink as connectedHarry Wentland1-1/+2
This was missed in the previous fake sink change. The fake sink allows us to enable a pipe with a disconnected display. We shouldn't report it as connected. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: To prevent detecting new sink from spurious HPDMartin Tsai2-13/+21
Signed-off-by: Martin Tsai <martin.tsai@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Add FBC on/off to front-end programmingRoman Li1-0/+9
- Fixing text mode for cases when VT-switch doesn't result in timing change Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: fix usb-c dongle regressionEric Yang1-2/+0
A previous change moved link_disconnect_sink after dpcd read, this causes the sink count to be overwritten which in turn causes another detection to be triggered in the short pulse handler, which brings down the display. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Force always scale chroma, set always_scaled to falseAndrew Jiang2-8/+5
This allows us to not always have scaling on, which causes issues with validation and causes the text to blur slightly. Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21drm/amd/display: Driver message to SMU to indicate display offHersen Wu4-17/+28
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-20drm/amdgpu:fix wb_clearMonk Liu1-2/+2
Properly shift the index when clearing so we clear the right bit Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-20drm/amdgpu:fix vf_error_putMonk Liu2-11/+17
1,it should not work on non-SR-IOV case 2,the NO_VBIOS error is incorrect, should handle it under detect_sriov_bios. 3,wrap the whole detect_sriov_bios with sriov check Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-20drm/amdgpu/sriov:now must reinit pspMonk Liu1-0/+1
otherwise after VF FLR the KIQ cannot work Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-20drm/amdgpu: merge bios post checking functionspding1-23/+18
Merge the post checking functions to avoid confusion and take virtualization into account in all cases. Signed-off-by: pding <Pixel.Ding@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-20Merge tag 'drm-amdkfd-next-2017-10-18' of ↵Dave Airlie11-338/+562
git://people.freedesktop.org/~gabbayo/linux into drm-next This is the amdkfd pull request for 4.15 merge window. The patches here are relevant only for Kaveri and Carrizo. Still no dGPU patches. The main goal is to continue alignment with the internal AMD development tree. The following is a summary of the changes: - Improvements and fixes to suspend/resume code - Improvements and fixes to process termination code - Cleanups in the queue unmapping functionality - Reuse code from amdgpu * tag 'drm-amdkfd-next-2017-10-18' of git://people.freedesktop.org/~gabbayo/linux: drm/amdkfd: Improve multiple SDMA queues support per process drm/amdkfd: Limit queue number per process and device to 127 drm/amdkfd: Clean up process queue management drm/amdkfd: Compress unnecessary function parameters drm/amdkfd: Improve process termination handling drm/amdkfd: Avoid submitting an unnecessary packet to HWS drm/amdkfd: Fix MQD updates drm/amdkfd: Pass filter params to unmap_queues_cpsch drm/amdkfd: move locking outside of unmap_queues_cpsch drm/amdkfd: Avoid name confusion involved in queue unmapping drm/amdkfd: Drop _nocpsch suffix from shared functions drm/amdkfd: Reuse CHIP_* from amdgpu v2 drm/amdkfd: Use VMID bitmap from KGD v2 drm/amdkfd: Adjust dequeue latencies and timeouts drm/amdkfd: Rectify the jiffies calculation error with milliseconds v2 drm/amdkfd: Fix suspend/resume issue on Carrizo v2 drm/amdkfd: Reorganize kfd resume code
2017-10-20Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie62-13296/+11737
into drm-next Last set of features for 4.15. Highlights: - Add a bo flag to allow buffers to opt out of implicit sync - Add ctx priority setting interface - Lots more powerplay cleanups - Start to plumb through vram lost infrastructure for gpu reset - ttm support for huge pages - misc cleanups and bug fixes * 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux: (73 commits) drm/amd/powerplay: Place the constant on the right side of the test drm/amd/powerplay: Remove useless variable drm/amd/powerplay: Don't cast kzalloc() return value drm/amdgpu: allow GTT overcommit during bind drm/amdgpu: linear validate first then bind to GART drm/amd/pp: Fix overflow when setup decf/pix/disp dpm table. drm/amd/pp: thermal control not enabled on vega10. drm/amdgpu: busywait KIQ register accessing (v4) drm/amdgpu: report more amdgpu_fence_info drm/amdgpu:don't check soft_reset for sriov drm/amdgpu:fix duplicated setting job's vram_lost drm/amdgpu:reduce wb to 512 slot drm/amdgpu: fix regresstion on SR-IOV gpu reset failed drm/amd/powerplay: Tidy up cz_dpm_powerup_vce() drm/amd/powerplay: Tidy up cz_dpm_powerdown_vce() drm/amd/powerplay: Tidy up cz_dpm_update_vce_dpm() drm/amd/powerplay: Tidy up cz_dpm_update_uvd_dpm() drm/amd/powerplay: Tidy up cz_dpm_powerup_uvd() drm/amd/powerplay: Tidy up cz_dpm_powerdown_uvd() drm/amd/powerplay: Tidy up cz_start_dpm() ...
2017-10-19drm/amd/powerplay: Place the constant on the right side of the testGeorgiana Chelu1-4/+4
Move the constant on the right side of the comparison in order to make the code easier to read. Issue found by checkpatch script: * WARNING: Comparisons should place the constant on the right side of the test Signed-off-by: Georgiana Chelu <georgiana.chelu93@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: Remove useless variableGeorgiana Chelu1-2/+1
The result variable is initialized at the beginning of the function, but its value does not change during the function execution. Thus, remove the variable and return the SUCCESS value, which is 0. Issue found by coccinelle script: * Unneeded variable: "result". Return "0" Path to the cocci script: scripts/coccinelle/misc/returnvar.cocci Signed-off-by: Georgiana Chelu <georgiana.chelu93@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: Don't cast kzalloc() return valueGeorgiana Chelu1-16/+8
The kzalloc function returns a void pointer and the assignment operator converts it to the type of pointer it is assigned to. Therefore, there is no need to cast. Issue found by alloc_cast.cocci: * WARNING: casting value returned by memory allocation function to <struct type> is useless. Path to the cocci script: scripts/coccinelle/api/alloc/alloc_cast.cocci Signed-off-by: Georgiana Chelu <georgiana.chelu93@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: allow GTT overcommit during bindChristian König1-3/+5
While binding BOs to GART we need to allow a bit overcommit in the GTT domain. Otherwise we can never use the full GART space when GART size=GTT size. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: linear validate first then bind to GARTChristian König1-9/+9
For VM emulation for old UVD/VCE we need to validate the BO with linear VRAM flag set first and then eventually bind it to GART. Validating with linear VRAM flag set can move the BO to GART making UVD/VCE read/write from an unbound GART BO. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> CC: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: Fix overflow when setup decf/pix/disp dpm table.Rex Zhu1-4/+2
Clear the count in the single table setup function to avoid missing any tables. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: thermal control not enabled on vega10.Rex Zhu2-1/+3
regression issue. caused by "f12f9f5e5d455edebc01" forget to set start_thermal_controller function point. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: busywait KIQ register accessing (v4)pding6-25/+71
Register accessing is performed when IRQ is disabled. Never sleep in this function. Known issue: dead sleep in many use cases of index/data registers. v2: - wrap polling fence functions. - don't trigger IRQ for polling in case of wrongly fence signal. v3: - handle wrap round gracefully. - add comments for polling function v4: - don't return negative timeout confused with error code Signed-off-by: pding <Pixel.Ding@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: report more amdgpu_fence_infopding1-0/+13
Only for GFX ring. This can help checking MCBP feature. The fence at the end of the frame will indicate the completion status. If the frame completed normally, the fence is written to the address given in the EVENT_WRITE_EOP packet. If preemption occurred in the previous IB the address is adjusted by 2 DWs. If work submitted in the frame was reset before completion, the fence address is adjusted by four DWs. In the case that preemption occurred, and before preemption completed a reset was initiated, the address will be adjusted with six DWs Signed-off-by: pding <Pixel.Ding@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu:don't check soft_reset for sriovMonk Liu1-0/+3
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Ack-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu:fix duplicated setting job's vram_lostMonk Liu2-2/+1
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu:reduce wb to 512 slotMonk Liu1-1/+1
with current WB usage we only use 57 slots, so 512 is extreamly sufficient, and reduce to 512 can make WB fit into one page. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-27 06:21:35 +0300