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path: root/drivers/gpu/drm/amd
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2020-10-14drm/amd/pm: increase mclk switch threshold to 200 usEvan Quan1-1/+1
To avoid underflow seen on Polaris10 with some 3440x1440 144Hz displays. As the threshold of 190 us cuts too close to minVBlankTime of 192 us. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14drm/amd/display: kernel-doc: document force_timing_syncMauro Carvalho Chehab1-0/+2
As warned when running "make htmldocs": ./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h:345: warning: Function parameter or member 'force_timing_sync' not described in 'amdgpu_display_manager' This new struct member was not documented at kernel-doc markup. Fixes: 3d4e52d0cf24 ("drm/amd/display: Add debugfs for forcing stream timing sync") Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14drm/amd/display: remove no need return valueBernard Zhao3-14/+7
Functions (disable_all_writeback_pipes_for_stream & dc_enable_stereo & dc_post_update_surfaces_to_stream) always return true, there is no need to keep the return value. This change is to make the code a bit more readable. Signed-off-by: Bernard Zhao <bernard@vivo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14drm/amdgpu: fix semicolon.cocci warningskernel test robot1-1/+1
drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:608:2-3: Unneeded semicolon Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci Fixes: b4a7db71ea06 ("drm/amdgpu: add per device user friendly xgmi events for vega20") CC: Jonathan Kim <jonathan.kim@amd.com> Signed-off-by: kernel test robot <lkp@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14drm/amdgpu/swsmu: init the baco mutex in early_initAlex Deucher1-4/+3
GPU reset might get called during init time, before sw_init has been called. Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amd/display: Add green_sardine support to DMRoman Li1-0/+12
Display Manager support for green_sardine Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amd/display: Add green_sardine support to DCRoman Li4-0/+25
Display Core support for green_sardine Signed-off-by: Roman Li <Roman.Li@amd.com> Acked-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add DM block for dimgrey_cavefishTao Zhou2-0/+5
Add DM block support for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jack Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: remove ASD ucode init for dimgrey_cavefishTao Zhou1-3/+0
dimgrey_cavefish has no ASD ucode currently, remove its initialization. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jack Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amd/display: Add DCN302 support in amdgpu_dm (v2)Bhawanpreet Lakha1-1/+24
Handle CAVE_DIMGREY_CAVEFISH in amdgpu_dm v2: fix rebase typo (Alex) Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amd/display: Add support for DCN302 (v2)Bhawanpreet Lakha27-1/+2753
- add DCN302 resource, irq service, dmub loader, - handle DC_VERSION_DCN_3_02 - define DCN302 power gating functions - handle DCN302 in GPIO files - define I2C regs - add CONFIG_DRM_AMD_DC_DCN3_02 guard v2: rebase fixes (Alex) Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu/swsmu: update driver if version for dimgrey_cavefishTao Zhou1-1/+1
Per PMFW 59.7.0. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: remove gpu_info fw support for dimgrey_cavefishTao Zhou1-4/+1
Remove gpu_info fw support for dimgrey_cavefish, gpu info can be got from ip discovery. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: enable ih CG for dimgrey_cavefishTao Zhou1-1/+2
Set ih CG flag for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: enable hdp CG and LS for dimgrey_cavefishTao Zhou1-1/+3
Set hdp CG and LS flag for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add psp and smu block for dimgrey_cavefishTao Zhou1-0/+5
Add psp and smu block for dimgrey_cavefish with psp firmware load type. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by:Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu/swsmu: update driver if version for dimgrey_cavefish(v2)Tao Zhou1-1/+1
Per PMFW 59.5.0. v2: refine subject and commit message, fix typo Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu/swsmu: update driver if version for dimgrey_cavefishTao Zhou1-1/+1
Update driver if version from 0x5 to 0x6 for dimgrey_cavefish, per PMFW 59.04.0. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: enable jpeg3.0 for dimgrey_cavefishJames Zhu1-0/+1
Enable jpeg3.0 ip block for dimgrey_cavefish. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: enable vcn3.0 for dimgrey_cavefishJames Zhu1-0/+1
Enable vcn3.0 ip block for dimgrey_cavefish. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu/swsmu: update driver if version for dimgrey_cavefishTao Zhou1-1/+1
Update driver if version from 0x4 to 0x5 for dimgrey_cavefish, per PMFW 59.02.0. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: enable athub/mmhub PG for dimgrey_cavefishTao Zhou1-1/+3
Set athub/mmhub PG flag for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: enable mc CG and LS for dimgrey_cavefishTao Zhou1-1/+3
Set mc CG and LS flag for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: enable GFX clock gating for dimgrey_cavefishTao Zhou1-1/+4
Enable GFX MGCG, CGCG and 3DCG for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu/swsmu: update driver if version for dimgrey_cavefishTao Zhou1-1/+1
Update driver if version according to PMFW with version 0x003B0100. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: support athub cg setting for dimgrey_cavefishTao Zhou1-0/+1
Same as navy_flounder, the athub ip of dimgrey_cavefish is v2.1. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: enable front door loading for dimgrey_cavefishTao Zhou1-2/+1
Support both back and front door loading for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: enable jpeg3.0 PG and CG for dimgrey_cavefishJames Zhu1-2/+4
Enable JPEG3.0 PG and CG for dimgrey_cavefish. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: enable VCN3.0 PG and CG for dimgrey_cavefishJames Zhu1-2/+3
Enable VCN3.0 PG and CG for dimgrey_cavefish Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdkfd: Add kfd2kgd_funcs for dimgrey_cavefish kfd supportChengming Gui1-0/+1
Add KFD support. Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdkfd: Support dimgrey_cavefish KFD (v2)Chengming Gui6-0/+25
Add KFD support for dimgrey cavefish. v2: rebase (Alex) Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add gc golden setting for dimgrey_cavefishTao Zhou1-0/+42
Add gc golden setting for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Tested-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: support cp_fw_write_wait for dimgrey_cavefishTao Zhou1-0/+1
Same as sienna_cichlid, dimgrey_cavefish supports WAIT_REG_MEM packet. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: skip reroute ih for some ASICsTao Zhou1-2/+2
Add check before reroute ih setting, it's not supported by some ASICs. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add psp support for dimgrey_cavefish(v2)Tao Zhou2-2/+16
General psp support for dimgrey_cavefish. v2: remove the checks for asd load and reroute ih. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: increase size of psp fw_name string(v2)Tao Zhou3-3/+4
Increase fw_name string size so longer chip name can be stored. v2: define macro for the length of psp fw name. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu/swsmu: add smu support for dimgrey_cavefish(v2)Tao Zhou3-3/+16
Reuse sienna_cichlid pp table for dimgrey_cavefish. v2: update related comment. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu/swsmu: increase size for smu fw_name stringTao Zhou2-1/+2
A longer chip name needs more space. v2: define macro for the length of smu fw name Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add gmc cg support for dimgrey_cavefishTao Zhou2-4/+5
The athub version for dimgrey_cavefish is v2.1. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu/vcn: enable VCN DPG mode for dimgrey_cavefishJames Zhu1-1/+1
Enable VCN DPG mode for dimgrey_cavefish. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu/vcn: add firmware support for dimgrey_cavefishJames Zhu1-0/+5
Add firmware support for dimgrey_cavefish. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: force pa_sc_tile_steering_override to 0 for dimgrey_cavefishTao Zhou1-0/+1
pa_sc_tile_steering_override is only programmable for gfx10.0/10.1/10.2, the same as sienna_cichlid. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add virtual display support for dimgrey_cavefishTao Zhou1-0/+2
Add virtual ip block for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: configure dimgrey_cavefish gfx according to gfx 10.3's definitionTao Zhou1-0/+9
The gfx version of dimgrey_cavefish is 10.3, identical to sienna_cichlid, follow the way of sienna_cichlid. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add sdma ip block for dimgrey_cavefishTao Zhou2-2/+10
Enable sdma block for dimgrey_cavefish, same as sienna_cichlid. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add gfx ip block for dimgrey_cavefishTao Zhou2-0/+5
Enable gfx block for dimgrey_cavefish, same as navy_flounder. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add ih ip block for dimgrey_cavefishTao Zhou2-0/+2
Enable ih block for dimgrey_cavefish, same as navy_flounder. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add gmc ip block for dimgrey_cavefishTao Zhou2-0/+2
Enable gmc block for dimgrey_cavefish, same as sienna_cichlid. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add common ip block for dimgrey_cavefishTao Zhou1-0/+3
Same as navy_flounder. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12drm/amdgpu: add mmhub support for dimgrey_cavefishTao Zhou1-0/+5
Same as navy_flounder. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-04 12:43:47 +0300