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2020-12-11drm/amd/pm: fulfill sienna cichlid 2nd usb2.0 port workaroundEvan Quan1-1/+39
Fulfill the 2nd usb2.0 port workaround for sienna cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-11drm/amd/pm: new SMC message for 2nd usb2.0 port workaroundEvan Quan3-0/+4
The workaround is needed by sienna cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-11drm/amdgpu: new macro for determining 2ND_USB20PORT supportEvan Quan1-0/+1
Used for determining 2ND_USB20PORT support from firmware_capability. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-11drm/amd/pm: expose the firmware_capability from firmware_info tableEvan Quan2-0/+3
That will help to determine whether 2ND_USB20_PORT workaround is needed for Sienna Cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-11drm/amd/pm: correct the gpo control for sienna cichlidEvan Quan3-11/+36
New SMC message was introduced for gpo control on sienna cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-11drm/amd/pm: correct power limit setting for SMU V11Evan Quan1-1/+22
Correct the power limit setting for SMU V11 asics. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-11drm/amd/pm: support power source switch on Sienna CichlidEvan Quan1-0/+4
Enable power source switch on Sienna Cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-11drm/amdkfd: correct pipe offset calculationJiansong Chen1-2/+2
Correct pipe offset calculation in is_pipe_enabled function, it should be done in queues. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-11drm/amd/display: Drop unnecessary function callRodrigo Siqueira1-19/+1
After refactor our amdgpu_dm_atomic_commit, this function only invoke drm_atomic_helper_commit. For this reason, this commit drops amdgpu_dm_atomic_commit and add drm_atomic_helper_commit directly in the atomic_commit hook. v2: squash in warning fix (Alex) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-11drm/amdgpu: limit the amdgpu_vm_update_ptes trace pointChristian König1-2/+3
The text output should not be more than a page, so only print the first 32 page table entries. If we need all of them we can still look into the binary trace. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amdgpu: clean up bo in vce and vcn testNirmoy Das2-4/+7
BO created with amdgpu_bo_create_reserved() wasn't clean properly before, which causes: [ 21.056218] WARNING: CPU: 0 PID: 7 at drivers/gpu/drm/ttm/ttm_bo.c:518 ttm_bo_release+0x2bf/0x310 [ttm] <snip> [ 21.056430] Call Trace: [ 21.056525] amdgpu_bo_unref+0x1a/0x30 [amdgpu] [ 21.056635] amdgpu_vcn_dec_send_msg+0x1b2/0x270 [amdgpu] [ 21.056740] amdgpu_vcn_dec_get_create_msg.constprop.0+0xd8/0x100 [amdgpu] [ 21.056843] amdgpu_vcn_dec_ring_test_ib+0x27/0x180 [amdgpu] [ 21.056936] amdgpu_ib_ring_tests+0xf1/0x150 [amdgpu] [ 21.057024] amdgpu_device_delayed_init_work_handler+0x11/0x30 [amdgpu] [ 21.057030] process_one_work+0x1df/0x370 [ 21.057033] worker_thread+0x46/0x340 [ 21.057034] ? process_one_work+0x370/0x370 [ 21.057037] kthread+0x11b/0x140 [ 21.057039] ? __kthread_bind_mask+0x60/0x60 [ 21.057043] ret_from_fork+0x22/0x30 Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/406382/ Signed-off-by: Christian König <christian.koenig@amd.com>
2020-12-10Merge tag 'amd-drm-next-5.11-2020-12-09' of ↵Dave Airlie271-2766/+83537
git://people.freedesktop.org/~agd5f/linux into drm-next amd-drm-next-5.11-2020-12-09: amdgpu: - SR-IOV fixes - Navy Flounder updates - Sienna Cichlid updates - Dimgrey Cavefish updates - Vangogh updates - Misc SMU fixes - Misc display fixes - Last big hunk of W=1 warning fixes - Cursor validation fixes - CI BACO updates From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201210045344.21566-1-alexander.deucher@amd.com Signed-off-by: Dave Airlie <airlied@redhat.com>
2020-12-10drm/amdgpu: Initialise drm_gem_object_funcs for imported BOsAndrey Grodzovsky2-20/+29
For BOs imported from outside of amdgpu, setting of amdgpu_gem_object_funcs was missing in amdgpu_dma_buf_create_obj. Fix by refactoring BO creation and amdgpu_gem_object_funcs setting into single function called from both code paths. Fixes: d693def4fd1c ("drm: Remove obsolete GEM and PRIME callbacks from struct drm_driver") v2: Use use amdgpu_gem_object_create() directly v3: fix warning Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amd/pm: typo fix (CUSTOM -> COMPUTE)Evan Quan1-1/+1
The "COMPUTE" was wrongly spelled as "CUSTOM". Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.9.x
2020-12-09drm/amdgpu: Initialise drm_gem_object_funcs for imported BOsAndrey Grodzovsky2-20/+29
For BOs imported from outside of amdgpu, setting of amdgpu_gem_object_funcs was missing in amdgpu_dma_buf_create_obj. Fix by refactoring BO creation and amdgpu_gem_object_funcs setting into single function called from both code paths. Fixes: d693def4fd1c ("drm: Remove obsolete GEM and PRIME callbacks from struct drm_driver") v2: Use use amdgpu_gem_object_create() directly v3: fix warning Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amdgpu: fix size calculation with stolen vga memoryAlex Deucher1-0/+3
If we need to keep the stolen vga memory, make sure it is at least as big as the legacy vga size. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-12-09drm/amd/pm: update smu10.h WORKLOAD_PPLIB setting for ravenChangfeng2-14/+9
When using old WORKLOAD_PPLIB setting in smu10.h, there is problem that it can't be able to switch to mak gpu clk during compute workload. It needs to update WORKLOAD_PPLIB setting to fix this issue. Signed-off-by: Changfeng <Changfeng.Zhu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-12-09drm/amdkfd: Fix leak in dmabuf importFelix Kuehling1-0/+2
Release dmabuf reference before returning from kfd_ioctl_import_dmabuf. amdgpu_amdkfd_gpuvm_import_dmabuf takes a reference to the underlying GEM BO and doesn't keep the reference to the dmabuf wrapper. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amdgpu: fix sdma instance fw version and feature version initStanley.Yang1-1/+1
each sdma instance fw_version and feature_version should be set right value when asic type isn't between SIENNA_CICHILD and CHIP_DIMGREY_CAVEFISH Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-12-09drm/amd/display: Add wm table for RenoirSung Lee1-4/+89
[Why] Without additional HostVM Latency, Renoir takes 2us longer to exit self-refresh. This causes underflow in certain cases. [How] Add table for Renoir with updated sr exit latencies for WM set A. Signed-off-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Prevent bandwidth overflowChris Park1-2/+5
[Why] At very high pixel clock, bandwidth calculation exceeds 32 bit size and overflow value. This causes the resulting selection of link rate to be inaccurate. [How] Change order of operation and use fixed point to deal with integer accuracy. Also address bug found when forcing link rate. Signed-off-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amdgpu: fix debugfs creation/removal, againArnd Bergmann2-14/+5
There is still a warning when CONFIG_DEBUG_FS is disabled: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1145:13: error: 'amdgpu_ras_debugfs_create_ctrl_node' defined but not used [-Werror=unused-function] 1145 | static void amdgpu_ras_debugfs_create_ctrl_node(struct amdgpu_device *adev) Change the code again to make the compiler actually drop this code but not warn about it. Fixes: ae2bf61ff39e ("drm/amdgpu: guard ras debugfs creation/removal based on CONFIG_DEBUG_FS") Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amdgpu/disply: set num_crtc earlierAlex Deucher1-5/+4
To avoid a recently added warning: Bogus possible_crtcs: [ENCODER:65:TMDS-65] possible_crtcs=0xf (full crtc mask=0x7) WARNING: CPU: 3 PID: 439 at drivers/gpu/drm/drm_mode_config.c:617 drm_mode_config_validate+0x178/0x200 [drm] In this case the warning is harmless, but confusing to users. Fixes: 0df108237433 ("drm: Validate encoder->possible_crtcs") Bug: https://bugzilla.kernel.org/show_bug.cgi?id=209123 Reviewed-by: Daniel Vetter <daniel@ffwll.ch> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-12-09drm/amdgpu/powerplay: parse fan table for CI asicsAlex Deucher1-1/+102
Set up all the parameters required for SMU fan control if supported. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=201539 Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-12-09drm/amdgpu: fix size calculation with stolen vga memoryAlex Deucher1-0/+3
If we need to keep the stolen vga memory, make sure it is at least as big as the legacy vga size. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amdgpu: remove amdgpu_ttm_late_init and amdgpu_bo_late_initAlex Deucher9-36/+0
No longer used. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amdgpu: free the pre-OS console framebuffer after the first modesetAlex Deucher2-6/+7
Rather than in late_init to avoid race conditions between freeing the buffers and the initial modeset. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amdgpu: enable runtime pm using BACO on CI dGPUsAlex Deucher1-5/+1
Works using BACO. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amdgpu/cik: enable BACO reset on BonaireAlex Deucher1-4/+0
Works now that the BACO sequence is fixed. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/pm: update smu10.h WORKLOAD_PPLIB setting for ravenChangfeng2-14/+9
When using old WORKLOAD_PPLIB setting in smu10.h, there is problem that it can't be able to switch to mak gpu clk during compute workload. It needs to update WORKLOAD_PPLIB setting to fix this issue. Signed-off-by: Changfeng <Changfeng.Zhu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/pm: remove one unsupported smu function for vangoghXiaojian Du1-1/+0
This patch is to remove one unsupported smu function, this function will set the smu feature mask to disable all smu features in exception. Because vangogh doesn't support to set the smu feature mask by driver software, so this function is invalid for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: setup system context for APUsRoman Li1-1/+1
[Why] Scatter/gather is APU feature. But in dm it is limited only to Renoir. Now we need it for Vangogh. [How] Apply system context setup in dm_init to all APUs. Signed-off-by: Roman Li <roman.li@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: add S/G support for VangoghRoman Li1-0/+1
[Why] Scatter/gather feature is supported on Vangogh. [How] Add GTT domain support for Vangogh to enable display buffers in system memory. Signed-off-by: Roman Li <roman.li@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amdkfd: Fix leak in dmabuf importFelix Kuehling1-0/+2
Release dmabuf reference before returning from kfd_ioctl_import_dmabuf. amdgpu_amdkfd_gpuvm_import_dmabuf takes a reference to the underlying GEM BO and doesn't keep the reference to the dmabuf wrapper. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amdgpu: use AMDGPU_NUM_VMID when possibleNirmoy Das12-12/+12
Replace hardcoded vmid number with AMDGPU_NUM_VMID macro. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amdgpu: fix sdma instance fw version and feature version initStanley.Yang1-1/+1
each sdma instance fw_version and feature_version should be set right value when asic type isn't between SIENNA_CICHILD and CHIP_DIMGREY_CAVEFISH Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/pm: update driver if version for dimgrey_cavefishTao Zhou1-1/+1
Per PMFW 59.16.0. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: 3.2.115Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: [FW Promotion] Release 0.0.45Anthony Koo1-2/+15
- Add define for __forceinline Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Revert DCN2.1 dram_clock_change_latency updateMichael Strauss1-1/+1
[Why] New value breaks VSR on high refresh panels, reverting until a fix is developed Signed-off-by: Michael Strauss <michael.strauss@amd.com> Signed-off-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Enable gpu_vm_support for dcn3.01Charlene Liu1-0/+5
[Why] dcn3_01 supports gpu_vm, but this is not enabled in amdgpu_dm Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Fixed the audio noise during mode switching with HDCP mode onRoy Chan1-2/+5
[Why] When HDCP is on, some display would introduce audio noise during HDCP handling. [How] Mute before HDCP handling when disabling core link. Unmute after HDCP when enabling core link. Signed-off-by: Roy Chan <roy.chan@amd.com> Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Add wm table for RenoirSung Lee1-4/+89
[Why] Without additional HostVM Latency, Renoir takes 2us longer to exit self-refresh. This causes underflow in certain cases. [How] Add table for Renoir with updated sr exit latencies for WM set A. Signed-off-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Prevent bandwidth overflowChris Park1-2/+5
[Why] At very high pixel clock, bandwidth calculation exceeds 32 bit size and overflow value. This causes the resulting selection of link rate to be inaccurate. [How] Change order of operation and use fixed point to deal with integer accuracy. Also address bug found when forcing link rate. Signed-off-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Only one display lights up while using MST hubQingqing Zhuo3-6/+21
[Why] With the addition of dc_lock acquire before dc_link_handle_hpd_rx_irq, there will be a deadlock situation where commit state sends a request for payload allocation on MST and wait for HPD to process DOWN_REP. [How] Move forward the MST message handling in handle_hpd_rx_irq so that it will not rely on call to dc_link_handle_hpd_rx_irq. Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Use provided offset for DPG generationWesley Chalmers1-1/+1
[Why] Currently, the offset provided to dcn30_set_disp_pattern_generator is not forwarded to OPP for display pattern generation, resulting in misaligned patterns and test failures. [How] Use the provided offset. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Samson Tam <Samson.Tam@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Change to IMMEDIATE mode from FRAME modeJudy Cai2-34/+66
[Why] Change in DCN10 to use IMMEDIATE_UPDATE mode for AFMT is not reflected in DCN30 as it uses VPG. [How] Use IMMEDIATE_UPDATE mode for DCN30 in VPG. Signed-off-by: Judy Cai <HuiYi.Cai@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Don't check seamless boot in power down HW by timeoutJohn Wu1-4/+1
[Why] power_down_on_boot is designed to power down HW when set mode is not called before timeout. It can happen in headless system or booting with the display is output by non-AMD GPU only. The function will be executed only if it's not seamless boot. So in seamless boot, the HW is still on. It's not necessary to check this since there's no display data in both cases. [How] Remove seamless boot checking in power_down_on_boot. Signed-off-by: John Wu <john.wu@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Set default bits per channelJing Zhou2-5/+14
[Why] Bump into calcReducedBlankingTiming because of mode query failed. In this function, timing.displayColorDepth == DISPLAY_COLOR_DEPTH_UNDEFINED. Then req_bw == 0 because of bits_per_channel == 0. So decide edp link settings, use default RBRx1 for special timing. [How] Set default bits_per_channel is 8. Signed-off-by: Jing Zhou <Jing.Zhou@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09drm/amd/display: Add support for runtime feature detection commandWyatt Wood2-0/+35
[Why] Add support for new fw command for runtime feature detection. [How] Driver sends command through ring buffer, and fw returns data back through this command. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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