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path: root/drivers/gpu/drm/amd/powerplay
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2020-03-26drm/amdgpu/swSMU: handle manual AC/DC notificationsAlex Deucher2-0/+24
For boards that do not support automatic AC/DC transitions in firmware, manually tell the firmware when the status changes. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-26drm/amdgpu/swSMU: handle DC controlled by GPIO for navi1xAlex Deucher2-1/+7
Check the platform caps in the vbios pptable to decide whether to enable automatic AC/DC transitions. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-26drm/amdgpu/swSMU: set AC/DC mode based on the current system state (v2)Alex Deucher1-6/+6
Check of the pointer exists and we are actually on AC power. v2: fix error message to reflect AC/DC mode. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-26drm/amdgpu/swSMU: correct the bootup power source for Navi1X (v2)Evan Quan1-0/+15
PMFW may boots those ASICs with DC mode. Need to set it back to AC mode. v2: split from Evan's original patch (Alex) Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-26drm/amdgpu/swSMU: use the smu11 power source helper for navi1xAlex Deucher1-0/+1
The smu_v11_0 version works for navi1x. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-26drm/amdgpu/smu11: add a helper to set the power sourceAlex Deucher2-0/+18
Add a common smu11 helper to set the AC/DC power source. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-26drm/amd/swSMU: add callback to set AC/DC power source (v2)Evan Quan2-0/+4
This is needed to tell the SMU firmware what state is in in certain cases. DC mode does not allow overclocking for example. v2: split Evan's original patch (Alex) Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-19amd/powerplay: arcturus baco reset disable all featuresJohn Clements1-8/+13
issue smu cmd to disable all features upon baco entry for arcturus to mitigate potential dirty I2C controller on boot Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-16drm/amdgpu: Move EEPROM I2C adapter to amdgpu_deviceAndrey Grodzovsky3-2/+23
Puts the i2c adapter in common place for sharing by RAS and upcoming data read from FRU EEPROM feature. v2: Move i2c adapter to amdgpu_pm and rename it. v3: Move i2c adapter init to ASIC specific code and get rid of the switch case in amdgpu_device Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-13drm/amdgpu/swsmu: clean up unused header in swsmuKevin Wang7-10/+0
clean up unused header in swsmu driver stack: 1. pp_debug.h 2. amd_pcie.h 3. soc15_common.h Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-13drm/amd/powerplay: Move fallthrough; into containing #ifdef/#endifJoe Perches1-1/+1
The automated conversion of /* fallthrough */ comments converted a comment outside of an #ifdef/#endif case block that should be inside the block. Move the fallthrough inside the block to silence the warning. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-13AMD POWERPLAY: Use fallthrough;Joe Perches1-3/+3
Convert the various uses of fallthrough comments to fallthrough; Done via script Link: https://lore.kernel.org/lkml/b56602fcf79f849e733e7b521bb0e17895d390fa.1582230379.git.joe@perches.com/ Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-10drm/amd/powerplay: fix the coverity warning about negative check for an ↵Prike Liang1-3/+0
unsigned value There will be a coverity warning because min and max are both unsigned. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-09drm/amd/powerplay: add smu if version for navi12Xiaojie Yuan2-0/+4
Fix version for navi12. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-05drm/amd/powerplay: map mclk to fclk for COMBINATIONAL_BYPASS casePrike Liang1-3/+3
When hit COMBINATIONAL_BYPASS the mclk will be bypass and can export fclk frequency to user usage. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-05drm/amd/powerplay: fix pre-check condition for setting clock rangePrike Liang2-4/+1
This fix will handle some MP1 FW issue like as mclk dpm table in renoir has a reverse dpm clock layout and a zero frequency dpm level as following case. cat pp_dpm_mclk 0: 1200Mhz 1: 1200Mhz 2: 800Mhz 3: 0Mhz Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-05drm/amdgpu: Add debugfs interface to set arbitrary sclk for navi14 (v2)Chengming Gui1-0/+3
add debugfs interface amdgpu_force_sclk to set arbitrary sclk for navi14 v2: Add lock Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-05drm/amdgpu: add lock option for smu_set_soft_freq_range()Chengming Gui4-13/+18
Add lock_needed param for smu_set_soft_freq_range() Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-29drm/amdgpu/smu: Add message sending lockMatt Coffin4-9/+15
This adds a message lock to the smu_send_smc_msg* implementations to protect against concurrent access to the mmu registers used to communicate with the SMU v2: Implement for smu_v12_0 as well v3: Add mutex_init for message_lock Signed-off-by: Matt Coffin <mcoffin13@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-29drm/amdgpu/powerplay: Remove deprecated smc_read_argMatt Coffin10-13/+2
The new interface reads the argument in the call to send the message, so this is no longer needed, and shouldn't be used for concurrency safety reasons. Signed-off-by: Matt Coffin <mcoffin13@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-29drm/amdgpu/powerplay: Refactor SMU message handling for safetyMatt Coffin11-205/+211
Move the responsibility for reading argument registers into the smu_send_smc_msg* implementations, so that adding a message-sending lock to protect the SMU registers will result in the lock still being held when the argument is read. v2: transition smu_v12_0, it's asics, and vega20 Signed-off-by: Matt Coffin <mcoffin13@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-29drm/amdgpu/powerplay: nv1x, renior copy dcn clock settings of watermark to ↵Hersen Wu3-13/+21
smu during boot up dc to pplib interface is changed for navi1x, renoir. display_config_changed is not called by dc anymore. smu_write_watermarks_table is not executed for navi1x, renoir during boot up. solution: call smu_write_watermarks_table just after dc pass watermark clock settings to pplib Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-26drm/amd/powerplay: add DFCstate control pptable func for arctHawking Zhang1-0/+23
This is the callback function that is going to be invoked when amdgpu_dpm_set_df_cstate is called to toggle DFCstate Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-26drm/amd/powerplay: update arcturus ppsmc header to 54.15.0Hawking Zhang1-1/+5
two new smc messages added for arcturus with pmfw 54.15.0 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-26drm/amd/powerplay: Use bitwise instead of arithmetic operator for flagsChen Zhou1-2/+2
This silences the following coccinelle warning: "WARNING: sum of probable bitmasks, consider |" Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Chen Zhou <chenzhou10@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-25drm/amdgpu: fix memory leak during TDR test(v2)Monk Liu1-1/+5
fix system memory leak v2: fix coding style Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-14drm/amd/powerplay: correct the way for checking SMU_FEATURE_BACO_BIT supportEvan Quan1-1/+12
Since 'smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT)' will always return false considering the 'smu_system_features_control(smu, false)' disabled all SMU features. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/powerplay: Ratelimit PP_ASSERT warningsKent Russell1-2/+2
In certain situations the message could be reported dozens-to-hundreds of times, based on how often the function is called. E.g. If MCLK DPM, any calls to get/set MCLK will result in a failure message, potentially flooding dmesg. Ratelimit the warnings to avoid this flood. Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amd/powerplay: always refetch the enabled features status on dpm enablementEvan Quan1-3/+3
Otherwise, the cached dpm features status may be inconsistent under some case(e.g. baco reset of Navi asic). Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu/powerplay: fix baco check for vega20Alex Deucher1-3/+4
We need to handle the runpm case as well as GPU reset. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu/smu: properly handle runpm/suspend/resetAlex Deucher1-16/+19
We need some special handling when using baco vs. other things. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu:/navi10: use the ODCAP enum to index the caps arrayAlex Deucher1-11/+11
Rather than the FEATURE_ID flags. Avoids a possible reading past the end of the array. Reviewed-by: Evan Quan <evan.quan@amd.com> Reported-by: Aleksandr Mezin <mezin.alexander@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu: update smu_v11_0_pptable.hAlex Deucher1-14/+32
Update to the latest changes. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amd/powerplay: suppress nonsupport profile mode overrun messagePrike Liang1-2/+6
SMU12 not support WORKLOAD_DEFAULT_BIT and WORKLOAD_PPLIB_POWER_SAVING_BIT. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amd/powerplay: update smu11_driver_if_navi10.hEvan Quan2-3/+4
To pair the latest SMU firmwares. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu/sriov set driver_table address in VFJack Zhang1-4/+4
With the recent patch to unify VRAM address for driver table(a83f82e). VF cannot dump table info any more because SMU_MSG_SetDriverDramAddrHigh/Low were deleted in the function of smu_update_table. Therefore, VF also needs to set driver_table address in smu_hw_init to fix this regression issue. Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-07drm/amd/powerplay: handle features disablement for baco reset in SMU FWEvan Quan1-14/+45
SMU FW will handle the features disablement for baco reset on Arcturus. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-07drm/amdgpu/sriov Don't send msg when smu suspendJack Zhang1-8/+13
For sriov and pp_onevf_mode, do not send message to set smu status, because smu doesn't support these messages under VF. Besides, it should skip smu_suspend when pp_onevf_mode is disabled. Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-05drm/amdgpu: update default voltage for boot od table for navi1xAlex Deucher1-1/+8
It needed to be updated as well so it will show the proper values if you reset to the defaults. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-04drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_voltageAlex Deucher1-3/+5
Cull out 0 clocks to avoid a warning in DC. Bug: https://gitlab.freedesktop.org/drm/amd/issues/963 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-04drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_latencyAlex Deucher1-6/+9
Only send non-0 clocks to DC for validation. This mirrors what the windows driver does. Bug: https://gitlab.freedesktop.org/drm/amd/issues/963 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-04drm/amdgpu: fetch default VDDC curve voltages (v2)Alex Deucher1-1/+49
Ask the SMU for the default VDDC curve voltage values. This properly reports the VDDC values in the OD interface. v2: only update if the original values are 0 Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.5.x
2020-02-04drm/amdgpu/smu_v11_0: Correct behavior of restoring default tables (v2)Matt Coffin4-20/+22
Previously, the syfs functionality for restoring the default powerplay table was sourcing it's information from the currently-staged powerplay table. This patch adds a step to cache the first overdrive table that we see on boot, so that it can be used later to "restore" the powerplay table v2: sqaush my original with Matt's fix Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020 Signed-off-by: Matt Coffin <mcoffin13@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.5.x
2020-02-04drm/amdgpu/navi10: add OD_RANGE for navi overclockingAlex Deucher1-0/+59
So users can see the range of valid values. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.5.x
2020-02-04drm/amdgpu/navi: fix index for OD MCLKAlex Deucher1-1/+1
You can only adjust the max mclk, not the min. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.5.x
2020-02-04drm/amd/powerplay: fix navi10 system intermittent reboot issue V2Evan Quan6-1/+86
This workaround is needed only for Navi10 12 Gbps SKUs. V2: added SMU firmware version guard Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-01-31drm/amdgpu/navi10: add mclk to navi10_get_clock_by_type_with_latencyAlex Deucher1-0/+2
Doesn't seem to be used, but add it just in case. Reviewed-by: Matt Coffin <mcoffin13@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-01-28drm/amd/powerplay: fix spelling mistake "Attemp" -> "Attempt"Colin Ian King2-12/+12
There are several spelling mistakes in PP_ASSERT_WITH_CODE messages. Fix these. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-01-28drm/amd/powerplay: use true, false for bool variable in smu7_hwmgr.czhengbin1-3/+3
Fixes coccicheck warning: drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:723:2-50: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:733:3-52: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:747:3-51: WARNING: Assignment of 0/1 to bool variable Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-01-16drm/amdgpu/sriov skip the update of SMU_TABLE_ACTIVITY_MONITOR_COEFFJack Zhang1-3/+4
There's no need to dump ACTIVITY_MONITOR_COEFF under VF. Therefore, Skip the update of SMU_TABLE_ACTIVITY_MONITOR_COEFF under SRIOV VF. Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-11 07:18:45 +0300