index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
fpga
Age
Commit message (
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)
Author
Files
Lines
2017-02-10
fpga zynq: Use the scatterlist interface
Jason Gunthorpe
1
-39
/
+135
2017-02-10
fpga: Add scatterlist based programming
Jason Gunthorpe
1
-30
/
+206
2017-02-10
fpga zynq: Check the bitstream for validity
Jason Gunthorpe
1
-0
/
+21
2017-02-10
fpga zynq: Check for errors after completing DMA
Jason Gunthorpe
1
-22
/
+32
2016-11-30
fpga: Clarify how write_init works streaming modes
Jason Gunthorpe
2
-2
/
+5
2016-11-30
fpga zynq: Fix incorrect ISR state on bootup
Jason Gunthorpe
1
-7
/
+10
2016-11-30
fpga zynq: Remove priv->dev
Jason Gunthorpe
1
-11
/
+8
2016-11-30
fpga zynq: Add missing \n to messages
Jason Gunthorpe
1
-11
/
+11
2016-11-30
fpga: Add COMPILE_TEST to all drivers
Jason Gunthorpe
1
-2
/
+3
2016-11-17
ARM: socfpga: checking the wrong variable
Dan Carpenter
1
-1
/
+1
2016-11-10
fpga-manager: Add Socfpga Arria10 support
Alan Tull
3
-0
/
+563
2016-11-10
fpga: add altera freeze bridge support
Alan Tull
3
-0
/
+283
2016-11-10
ARM: socfpga: fpga bridge driver support
Alan Tull
4
-0
/
+410
2016-11-10
fpga: fpga-region: device tree control for FPGA
Alan Tull
3
-0
/
+613
2016-11-10
fpga: add fpga bridge framework
Alan Tull
3
-0
/
+405
2016-11-10
fpga-mgr: add fpga image information struct
Alan Tull
3
-15
/
+19
2016-11-10
fpga: add method to get fpga manager from device
Alan Tull
1
-22
/
+54
2016-09-08
fpga manager: Add hardware dependency to Zynq driver
Jean Delvare
1
-0
/
+1
2016-08-04
drivers/fpga/Kconfig: fix build failure
Sudip Mukherjee
1
-0
/
+1
2015-11-25
fpga manager: Fix firmware resource leak on error
Tobias Klauser
1
-3
/
+1
2015-11-25
fpga manager: remove label
Alan Tull
1
-6
/
+3
2015-10-30
fpga: socfpga: Fix check of return value of devm_request_irq
Moritz Fischer
1
-1
/
+1
2015-10-24
fpga: zynq-fpga: Fix issue with drvdata being overwritten.
Moritz Fischer
1
-3
/
+4
2015-10-24
fpga manager: remove unnecessary null pointer checks
Alan Tull
1
-8
/
+4
2015-10-24
fpga manager: ensure lifetime with of_fpga_mgr_get
Alan Tull
1
-15
/
+17
2015-10-24
fpga: zynq-fpga: Change fw format to handle bin instead of bit.
Moritz Fischer
1
-22
/
+2
2015-10-24
fpga: zynq-fpga: Fix unbalanced clock handling
Moritz Fischer
1
-2
/
+2
2015-10-18
fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000
Moritz Fischer
3
-0
/
+539
2015-10-07
fpga manager: add driver for socfpga fpga manager
Alan Tull
3
-0
/
+627
2015-10-07
add FPGA manager core
Alan Tull
3
-0
/
+404