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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
fpga
/
xilinx-pr-decoupler.c
Age
Commit message (
Expand
)
Author
Files
Lines
2023-12-21
fpga: xilinx-pr-decoupler: Convert to platform remove callback returning void
Uwe Kleine-König
1
-4
/
+2
2023-10-13
fpga: Use device_get_match_data()
Rob Herring
1
-12
/
+5
2023-07-10
fpga: xilinx-pr-decoupler: Convert to devm_platform_ioremap_resource()
Yangtao Li
1
-3
/
+1
2023-03-25
fpga: xilinx-pr-decoupler: Use readl wrapper instead of pure readl
Michal Simek
1
-1
/
+1
2021-11-29
fpga: bridge: Use standard dev_release for class driver
Russ Weight
1
-11
/
+6
2021-07-25
fpga: xilinx-pr-decoupler: Address warning about unused variable
Moritz Fischer
1
-0
/
+2
2021-03-24
fpga: Add support for Xilinx DFX AXI Shutdown manager
Nava kishore Manne
1
-5
/
+32
2021-03-24
fpga: xilinx-pr-decoupler: Simplify code by using dev_err_probe()
Michal Simek
1
-5
/
+3
2020-01-10
fpga: xilinx-pr-decoupler: Remove clk_get error message for probe defer
Shubhrajyoti Datta
1
-1
/
+2
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285
Thomas Gleixner
1
-9
/
+1
2018-10-16
fpga: bridge: add devm_fpga_bridge_create
Alan Tull
1
-2
/
+2
2018-05-25
fpga: bridge: change api, don't use drvdata
Alan Tull
1
-5
/
+17
2017-10-04
fpga: make xlnx_pr_decoupler_br_ops const
Bhumika Goyal
1
-1
/
+1
2017-04-08
fpga: Add support for Xilinx LogiCORE PR Decoupler
Moritz Fischer
1
-0
/
+161