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path: root/drivers/edac/i7core_edac.c
AgeCommit message (Expand)AuthorFilesLines
2010-05-10i7core_edac: Some cleanups at displayed infoMauro Carvalho Chehab1-12/+9
2010-05-10i7core: remove some uneeded noisy debug messagesMauro Carvalho Chehab1-4/+0
2010-05-10i7core: add socket info at the debug msgMauro Carvalho Chehab1-2/+2
2010-05-10i7core: better document i7core_get_active_channels()Mauro Carvalho Chehab1-1/+17
2010-05-10i7core: fix get_devices routine for Xeon55xxMauro Carvalho Chehab1-78/+108
2010-05-10i7core: enrich error information based on memory transaction typeMauro Carvalho Chehab1-5/+27
2010-05-10i7core: check if the memory error is fatal or non-fatalMauro Carvalho Chehab1-3/+13
2010-05-10i7core: fix probing on Xeon55xxMauro Carvalho Chehab1-3/+20
2010-05-10i7core_edac: some fixes at memory error parserMauro Carvalho Chehab1-8/+14
2010-05-10i7core_edac: decode mcelog error and send it via edac interfaceMauro Carvalho Chehab1-22/+70
2010-05-10i7core_edac: maps all sockets as if ther are one MC controllerMauro Carvalho Chehab1-6/+7
2010-05-10i7core_edac: add support for more than one MC socketMauro Carvalho Chehab1-113/+213
2010-05-10i7core_edac: Add a code to probe Xeon 55xx busMauro Carvalho Chehab1-4/+13
2010-05-10i7core_edac: Adds write unlock to MC registersMauro Carvalho Chehab1-3/+27
2010-05-10i7core_edac: Add edac_mce glueMauro Carvalho Chehab1-2/+109
2010-05-10i7core_edac: CodingStyle fixesMauro Carvalho Chehab1-27/+32
2010-05-10i7core_edac: fill csrows edac sysfs infoMauro Carvalho Chehab1-16/+50
2010-05-10i7core_edac: Memory info fixes and preparation for properly filling cswrow dataMauro Carvalho Chehab1-9/+19
2010-05-10i7core_edac: Get more info about the memory DIMMsMauro Carvalho Chehab1-63/+107
2010-05-10i7core_edac: Add more information about each active dimmMauro Carvalho Chehab1-13/+30
2010-05-10i7core_edac: Improve error handlingMauro Carvalho Chehab1-11/+21
2010-05-10i7core_edac: Properly fill struct csrow_infoMauro Carvalho Chehab1-10/+38
2010-05-10i7core_edac: Add additional tests for error detectionMauro Carvalho Chehab1-60/+139
2010-05-10i7core_edac: Add a memory check routine, based on device 3 function 4Mauro Carvalho Chehab1-7/+108
2010-05-10i7core_edac: need mci->edac_check, otherwise module removal doesn't workMauro Carvalho Chehab1-4/+16
2010-05-10i7core_edac: A few fixes at error injection codeMauro Carvalho Chehab1-15/+55
2010-05-10i7core_edac: Show read/write virtual/physical channel associationMauro Carvalho Chehab1-6/+27
2010-05-10i7core_edac: Registers all supported MC functionsMauro Carvalho Chehab1-86/+131
2010-05-10i7core_edac: Add more status functions to EDAC driverMauro Carvalho Chehab1-19/+95
2010-05-10i7core_edac: Add error insertion code for NehalemMauro Carvalho Chehab1-8/+419
2010-05-10i7core_edac: Add an EDAC memory controller driver for Nehalem chipsetsMauro Carvalho Chehab1-0/+462
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