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path: root/drivers/dma
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2023-08-29dmaengine: dw-axi-dmac: Fix the bug that unable to transfer 270KB dataWalker Chen2-293/+202
Sync the code with 6.1 so as to fix the bug. Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
2023-07-10dmaengine: dw-axi-dmac-starfive-misc: Fix incorrect parametersSamin Guo1-1/+1
The second parameter of wait_event_interruptible_timeout is not an address pointer Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2022-11-14dma:dw:Add stg_axi clock and reset of noc_busXingyu Wu2-0/+18
Add 'JH7110_NOC_BUS_CLK_STG_AXI' clock and 'RSTN_U0_NOC_BUS_STG_AXI_N' reset. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-10-14CR_2285:SEC:Crypto:Starfive: Update hardware engine DMA driverjiajie.ho3-139/+1
Updating Starfive Jh7110 Crypto hardware engine to use orginal ARM PL08X driver. Signed-off-by: jiajie.ho <jiajie.ho@starfivetech.com>
2022-09-23Merge branch 'CR_1849_DMA_walker.chen' into 'jh7110-5.15.y-devel'andy.hu2-76/+25
CR_1849_DMA_walker.chen See merge request sdk/linux!483
2022-09-15CR_1849_DMA_515: Stop dma channelWalker Chen2-76/+25
DMA: fixed some issue. 1. Removed some invalid function such as dma_tasklet. 2. Export axi_dma_cyclic_stop function to other driver. 3. Setting timeout 200 ms to poll the status of dma when one channel is disabled. Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
2022-09-13dma:pl080:modify vic7110 function name to jh7110William Qiu1-6/+6
modify vic7110 function name to jh7110 Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2022-08-31dma: dw-axi-dmac: Standardize property "compatible"Hal Feng1-1/+1
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2022-08-26CR_1827_cannot_record_play_simultaneouslyWalker Chen1-18/+27
1.Resolved playback and record can work simultaneously. 2.Rearrange audio configuration in kernel menu. Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
2022-06-20Implement TDM driver for JH7110 SoCWalker Chen2-18/+49
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
2022-05-18[Audio: PWMDAC] enable pwmdac driver on 7110 evb boardcurry.zhang1-0/+5
Signed-off-by: curry.zhang <curry.zhang@starfivetech.com>
2022-05-07dmaengine:pl080: remove warning messagewilliam.qiu1-1/+1
remove warning message Signed-off-by: william.qiu <william.qiu@starfivetech.com>
2022-04-28crypto:starfive:jh7110: add crypto driver for starfive jh7110 soc.william.qiu1-0/+3200
add crypto driver for starfive jh7110 soc. Signed-off-by: william.qiu <william.qiu@starfivetech.com>
2022-04-28dmaengine:pl080: add support for starfive jh7110 soc sec.william.qiu3-1/+139
dd support for starfive jh7110 soc sec. Signed-off-by: william.qiu <william.qiu@starfivetech.com>
2022-04-24[DMA] : Add standard system clock tree & reset APIcurry.zhang2-0/+17
Signed-off-by: curry.zhang <curry.zhang@starfivetech.com>
2021-12-01Kconfig/dw-axi-dmac-starfive: selected by SOC_STARFIVEsamin1-1/+1
Signed-off-by: samin <samin.guo@starfivetech.com>
2021-11-23dma: Added DMA misc driver interface for data transfersamin5-0/+546
1)add async_memcpy api kernel space. 2)add dma-misc driver for user space. Signed-off-by: samin <samin.guo@starfivetech.com>
2021-11-23dmaengine: dw-axi-dmac: Add support for StarFive ALSA device.samin2-12/+37
Solve the problem of audio DMA transmission and playback failure. Signed-off-by: jenny.zhang <jenny.zhang@starfivetech.com> Signed-off-by: michael.yan <michael.yan@starfivetech.com> Signed-off-by: samin <samin.guo@starfivetech.com>
2021-11-23dmaengine: dw-axi-dmac: add burst_trans_len support.samin2-2/+18
Different peripherals may require different burst_trans_len. Some ALSA devices may require BURST_TRANS_LEN_16, but this parameter may not work properly on some peripherals (spi, etc.). This patch will allow BURST_TRANS_LEN to be passed in from DTS. dmas = <&dma hs_nu burst_trans_len> burst_trans_len: <-1> defalut <0> BURST_TRANS_LEN_1 <1> BURST_TRANS_LEN_4 /*defalut value*/ <2> BURST_TRANS_LEN_8 <3> BURST_TRANS_LEN_16 <4> BURST_TRANS_LEN_32 <5> BURST_TRANS_LEN_64 <6> BURST_TRANS_LEN_128 <7> BURST_TRANS_LEN_256 Signed-off-by: samin <samin.guo@starfivetech.com>
2021-11-23dmaengine: dw-axi-dmac: Add StarFive JHxxx AxiDMA supportsamin2-1/+20
Add support for StarFive AxiDMA to the .compatible field. The AxiDMA Apb region will be accessible if the compatible string matches the "starfive,axi-dma". Add "starfive_flush_dcache" due to VIC7100 Cache Coherency issues. Signed-off-by: samin <samin.guo@starfivetech.com>
2021-11-23dmaengine: dw-axi-dmac: Supports channels > 8 or hardware handshakes > 16.samin2-29/+177
1)Different num of chan/hw-handshakes have different register offsets. When the channel > 8, DMA uses DMAC_CHENREG2 instead of DMAC_CHENREG. When the channel > 8 or hw-handshake > 16, DMA uses CHx_CFG2 instead of CHx_CFG. 2)add OSR(Outstanding Request Limit) configuration OSR can greatly improve performance in dma-memcpy. Signed-off-by: samin <samin.guo@starfivetech.com>
2021-09-09Merge tag 'dmaengine-5.15-rc1' of ↵Linus Torvalds45-917/+3882
git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "New drivers/devices - Support for Renesas RZ/G2L dma controller - New driver for AMD PTDMA controller Updates: - Big pile of idxd updates - Updates for Altera driver, stm32-dma, dw etc" * tag 'dmaengine-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (83 commits) dmaengine: sh: fix some NULL dereferences dmaengine: sh: Fix unused initialization of pointer lmdesc MAINTAINERS: Fix AMD PTDMA DRIVER entry dmaengine: ptdma: remove PT_OFFSET to avoid redefnition dmaengine: ptdma: Add debugfs entries for PTDMA dmaengine: ptdma: register PTDMA controller as a DMA resource dmaengine: ptdma: Initial driver for the AMD PTDMA dmaengine: fsl-dpaa2-qdma: Fix spelling mistake "faile" -> "failed" dmaengine: idxd: remove interrupt disable for dev_lock dmaengine: idxd: remove interrupt disable for cmd_lock dmaengine: idxd: fix setting up priv mode for dwq dmaengine: xilinx_dma: Set DMA mask for coherent APIs dmaengine: ti: k3-psil-j721e: Add entry for CSI2RX dmaengine: sh: Add DMAC driver for RZ/G2L SoC dmaengine: Extend the dma_slave_width for 128 bytes dt-bindings: dma: Document RZ/G2L bindings dmaengine: ioat: depends on !UML dmaengine: idxd: set descriptor allocation size to threshold for swq dmaengine: idxd: make submit failure path consistent on desc freeing dmaengine: idxd: remove interrupt flag for completion list spinlock ...
2021-09-02Merge tag 'drivers-5.15' of ↵Linus Torvalds1-23/+70
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "These are updates for drivers that are tied to a particular SoC, including the correspondig device tree bindings: - A couple of reset controller changes for unisoc, uniphier, renesas and zte platforms - memory controller driver fixes for omap and tegra - Rockchip io domain driver updates - Lots of updates for qualcomm platforms, mostly touching their firmware and power management drivers - Tegra FUSE and firmware driver updateѕ - Support for virtio transports in the SCMI firmware framework - cleanup of ixp4xx drivers, towards enabling multiplatform support and bringing it up to date with modern platforms - Minor updates for keystone, mediatek, omap, renesas" * tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits) reset: simple: remove ZTE details in Kconfig help soc: rockchip: io-domain: Remove unneeded semicolon soc: rockchip: io-domain: add rk3568 support dt-bindings: power: add rk3568-pmu-io-domain support bus: ixp4xx: return on error in ixp4xx_exp_probe() soc: renesas: Prefer memcpy() over strcpy() firmware: tegra: Stop using seq_get_buf() soc/tegra: fuse: Enable fuse clock on suspend for Tegra124 soc/tegra: fuse: Add runtime PM support soc/tegra: fuse: Clear fuse->clk on driver probe failure soc/tegra: pmc: Prevent racing with cpuilde driver soc/tegra: bpmp: Remove unused including <linux/version.h> dt-bindings: soc: ti: pruss: Add dma-coherent property soc: ti: Remove pm_runtime_irq_safe() usage for smartreflex soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM64x SoCs dt-bindings: soc: ti: pruss: Update bindings for K3 AM64x SoCs firmware: arm_scmi: Use WARN_ON() to check configured transports firmware: arm_scmi: Fix boolconv.cocci warnings soc: mediatek: mmsys: Fix missing UFOE component in mt8173 table routing soc: mediatek: mmsys: add MT8365 support ...
2021-08-31dmaengine: sh: fix some NULL dereferencesDan Carpenter1-2/+2
The dma_free_coherent() function needs a valid device pointer or it will crash. Fixes: 550c591a89a1 ("dmaengine: sh: Add DMAC driver for RZ/G2L SoC") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20210827085410.GA9183@kili Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-31dmaengine: sh: Fix unused initialization of pointer lmdescColin Ian King1-3/+1
Pointer lmdesc is being inintialized with a value that is never read, it is later being re-assigned a new value. Fix this by initializing it with the latter value. Addresses-Coverity: ("Unused value") Fixes: 550c591a89a1 ("dmaengine: sh: Add DMAC driver for RZ/G2L SoC") Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20210829152811.529766-1-colin.king@canonical.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29dmaengine: ptdma: remove PT_OFFSET to avoid redefnitionSanjay R Mehta1-1/+0
Building on ARCH=um causes a "redefined" warning, so remove this PT_OFFSET macro to avoid the warning. drivers/dma/ptdma/ptdma.h:34: warning: "PT_OFFSET" redefined 34 | #define PT_OFFSET 0x0 | In file included from ./arch/um/include/asm/thread_info.h:17, from ./include/linux/thread_info.h:60, from ./include/asm-generic/preempt.h:5, from ./arch/um/include/generated/asm/preempt.h:1, from ./include/linux/preempt.h:78, from ./include/linux/spinlock.h:55, from ./include/linux/wait.h:9, from ./include/linux/wait_bit.h:8, from ./include/linux/fs.h:6, from ./include/linux/debugfs.h:15, from drivers/dma/ptdma/ptdma-debugfs.c:12: ./arch/x86/um/shared/sysdep/ptrace_user.h:4: note: this is the location of the previous definition 4 | #define PT_OFFSET(r) ((r) * sizeof(long)) Reported-by: kernel test robot <lkp@intel.com> Fixes: 2a99524459ce ("dmaengine: ptdma: Initial driver for the AMD PTDMA") Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com> Link: https://lore.kernel.org/r/1630178908-54973-1-git-send-email-Sanju.Mehta@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29dmaengine: ptdma: Add debugfs entries for PTDMASanjay R Mehta4-1/+118
Expose data about the configuration and operation of the PTDMA through debugfs entries: device name, capabilities, configuration, statistics. Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com> Link: https://lore.kernel.org/r/1629208559-51964-4-git-send-email-Sanju.Mehta@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29dmaengine: ptdma: register PTDMA controller as a DMA resourceSanjay R Mehta5-1/+450
Register ptdma queue to Linux dmaengine framework as general-purpose DMA channels. Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com> Link: https://lore.kernel.org/r/1629208559-51964-3-git-send-email-Sanju.Mehta@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29dmaengine: ptdma: Initial driver for the AMD PTDMASanjay R Mehta7-0/+828
Add support for AMD PTDMA controller. It performs high-bandwidth memory to memory and IO copy operation. Device commands are managed via a circular queue of 'descriptors', each of which specifies source and destination addresses for copying a single buffer of data. Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com> Link: https://lore.kernel.org/r/1629208559-51964-2-git-send-email-Sanju.Mehta@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29dmaengine: fsl-dpaa2-qdma: Fix spelling mistake "faile" -> "failed"Colin Ian King1-1/+1
There is a spelling mistake in a dev_err error message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20210826122500.13743-1-colin.king@canonical.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29dmaengine: idxd: remove interrupt disable for dev_lockDave Jiang4-32/+22
The spinlock is not being used in hard interrupt context. There is no need to disable irq when acquiring the lock. The interrupt thread handler also is not in bottom half context, therefore we can also remove disabling of the bh. Convert all dev_lock acquisition to plain spin_lock() calls. Reviewed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/162984026772.1939166.11504067782824765879.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29dmaengine: idxd: remove interrupt disable for cmd_lockDave Jiang1-11/+8
The cmd_lock spinlock is not being used in hard interrupt context. There is no need to disable irq when acquiring the lock. Convert all cmd_lock acquisition to plain spin_lock() calls. Reviewed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/162984027930.1939209.15758413737332339204.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29dmaengine: idxd: fix setting up priv mode for dwqDave Jiang3-2/+34
DSA spec says WQ priv bit is 0 if the Privileged Mode Enable field of the PCI Express PASID capability is 0 and pasid is enabled. Make sure that the WQCFG priv field is set correctly according to usage type. Reject config if setting up kernel WQ type and no support. Also add the correct priv setup for a descriptor. Fixes: 484f910e93b4 ("dmaengine: idxd: fix wq config registers offset programming") Cc: Ramesh Thomas <ramesh.thomas@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/162939084657.903168.14160019185148244596.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29dmaengine: xilinx_dma: Set DMA mask for coherent APIsRadhey Shyam Pandey1-1/+1
The xilinx dma driver uses the consistent allocations, so for correct operation also set the DMA mask for coherent APIs. It fixes the below kernel crash with dmatest client when DMA IP is configured with 64-bit address width and linux is booted from high (>4GB) memory. Call trace: [ 489.531257] dma_alloc_from_pool+0x8c/0x1c0 [ 489.535431] dma_direct_alloc+0x284/0x330 [ 489.539432] dma_alloc_attrs+0x80/0xf0 [ 489.543174] dma_pool_alloc+0x160/0x2c0 [ 489.547003] xilinx_cdma_prep_memcpy+0xa4/0x180 [ 489.551524] dmatest_func+0x3cc/0x114c [ 489.555266] kthread+0x124/0x130 [ 489.558486] ret_from_fork+0x10/0x3c [ 489.562051] ---[ end trace 248625b2d596a90a ]--- Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Reviewed-by: Harini Katakam <harini.katakam@xilinx.com> Link: https://lore.kernel.org/r/1629363528-30347-1-git-send-email-radhey.shyam.pandey@xilinx.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29dmaengine: ti: k3-psil-j721e: Add entry for CSI2RXPratyush Yadav1-0/+73
The CSI2RX subsystem on J721E is serviced by UDMA via PSI-L to transfer frames to memory. It can have up to 32 threads per instance. J721E has two instances of the subsystem, so there are 64 threads total. Add them to the endpoint map. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Acked-by: Peter Ujfalusi <peter.ujflausi@gmail.com> Link: https://lore.kernel.org/r/20210819110106.31409-1-p.yadav@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29dmaengine: sh: Add DMAC driver for RZ/G2L SoCBiju Das3-0/+981
Add DMA Controller driver for RZ/G2L SoC. Based on the work done by Chris Brandt for RZ/A DMA driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20210806095322.2326-4-biju.das.jz@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-25dmaengine: ioat: depends on !UMLJohannes Berg1-1/+1
Now that UML has PCI support, this driver must depend also on !UML since it pokes at X86_64 architecture internals that don't exist on ARCH=um. Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Johannes Berg <johannes.berg@intel.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20210809112409.a3a0974874d2.I2ffe3d11ed37f735da2f39884a74c953b258b995@changeid Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-25dmaengine: idxd: set descriptor allocation size to threshold for swqDave Jiang1-2/+2
Since submission is sent to limited portal, the actual wq size for shared wq is set by the threshold rather than the wq size. When the wq type is shared, set the allocated descriptors to the threshold. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/162827151733.3459223.3829837172226042408.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-25dmaengine: idxd: make submit failure path consistent on desc freeingDave Jiang2-5/+10
The submission path for dmaengine API does not do descriptor freeing on failure. Also, with the abort mechanism, the freeing of descriptor happens when the abort callback is completed. Therefore free descriptor on all error paths for submission call to make things consistent. Also remove the double free that would happen on abort in idxd_dma_tx_submit() call. Fixes: 6b4b87f2c31a ("dmaengine: idxd: fix submission race window") Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/162827146072.3459011.10255348500504659810.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-12Merge tag 'imx-ecspi-5.15' of ↵Arnd Bergmann1-23/+70
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX eCSPI errata handling for 5.15: It includes all required changes for handling i.MX6/7 eCSPI errata ERR009165, which causes FIFO transfer to be sent twice in DMA mode. Both SPI and DMA maintainers agree to merge it through arm-soc tree. * tag 'imx-ecspi-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dmaengine: imx-sdma: add terminated list for freed descriptor in worker dmaengine: imx-sdma: add uart rom script dma: imx-sdma: add i.mx6ul compatible name dmaengine: imx-sdma: remove ERR009165 on i.mx6ul spi: imx: remove ERR009165 workaround on i.mx6ul spi: imx: fix ERR009165 dmaengine: imx-sdma: add mcu_2_ecspi script dmaengine: dma: imx-sdma: add fw_loaded and is_ram_script dmaengine: imx-sdma: remove duplicated sdma_load_context Revert "dmaengine: imx-sdma: refine to load context only once" Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores" Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core" Link: https://lore.kernel.org/r/20210809071838.GF30984@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-09Merge 5.14-rc5 into driver-core-nextGreg Kroah-Hartman12-53/+151
We need the driver core fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-08-06Merge tag 'dmaengine-fix-5.14' of ↵Linus Torvalds12-53/+151
git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine fixes from Vinod Koul: "A bunch of driver fixes, notably: - idxd driver fixes for submission race, driver remove sequence, setup sequence for MSIXPERM, array index and updating descriptor vector - usb-dmac, pm reference leak fix - xilinx_dma, read-after-free fix - uniphier-xdmac fix for using atomic readl_poll_timeout_atomic() - of-dma, router_xlate to return - imx-dma, generic dma fix" * tag 'dmaengine-fix-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: dmaengine: imx-dma: configure the generic DMA type to make it work dmaengine: of-dma: router_xlate to return -EPROBE_DEFER if controller is not yet available dmaengine: stm32-dmamux: Fix PM usage counter unbalance in stm32 dmamux ops dmaengine: stm32-dma: Fix PM usage counter imbalance in stm32 dma ops dmaengine: uniphier-xdmac: Use readl_poll_timeout_atomic() in atomic state dmaengine: idxd: fix submission race window dmaengine: idxd: fix sequence for pci driver remove() and shutdown() dmaengine: idxd: fix desc->vector that isn't being updated dmaengine: idxd: fix setup sequence for MSIXPERM table dmaengine: idxd: fix array index when int_handles are being used dmaengine: usb-dmac: Fix PM reference leak in usb_dmac_probe() dmaengine: xilinx_dma: Fix read-after-free bug when terminating transfers
2021-08-06dmaengine: idxd: remove interrupt flag for completion list spinlockDave Jiang2-10/+7
The list lock is never acquired in interrupt context. Therefore there is no need to disable interrupts. Remove interrupt flags for lock operations. Reviewed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/162826417450.3454650.3733188117742416238.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06dmaengine: acpi: Check for errors from acpi_register_gsi() separatelyAndy Shevchenko1-1/+9
While IRQ test agaist the returned variable in practice is a good enough there is still a room for theoretical mistake in case the vIRQ of the device contains the same error code that acpi_register_gsi() may return. Due to this, check for error code separately from matching the vIRQs. Besides that, append documentation to tell why acpi_gsi_to_irq() can't be used and we call acpi_register_gsi() instead. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210802175532.54311-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06dmaengine: acpi: Avoid comparison GSI with Linux vIRQAndy Shevchenko1-3/+7
Currently the CRST parsing relies on the fact that on most of x86 devices the IRQ mapping is 1:1 with Linux vIRQ. However, it may be not true for some. Fix this by converting GSI to Linux vIRQ before checking it. Fixes: ee8209fd026b ("dma: acpi-dma: parse CSRT to extract additional resources") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210730202715.24375-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06dmaengine: idxd: make I/O interrupt handler one shotDave Jiang1-51/+8
The interrupt thread handler currently loops forever to process outstanding completions. This causes either an "irq X: nobody cared" kernel splat or the NMI watchdog kicks in due to running too long in the function. The irq thread handler is expected to run again after exiting if there are interrupts fired while the thread handler is running. So the handler code can process all the completed I/O in a single pass and exit without losing the follow on completed I/O. Reviewed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/162802977005.3084234.11836261157026497585.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06dmaengine: idxd: clear block on fault flag when clear wqDave Jiang1-0/+1
The block on fault flag is not cleared when we disable or reset wq. This causes it to remain set if the user does not clear it on the next configuration load. Add clear of flag in dxd_wq_disable_cleanup() routine. Fixes: da32b28c95a7 ("dmaengine: idxd: cleanup workqueue config after disabling") Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/162803023553.3086015.8158952172068868803.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06dmaengine: idxd: add capability check for 'block on fault' attributeDave Jiang1-0/+3
The device general capability has a bit that indicate whether 'block on fault' is supported. Add check to wq sysfs knob to check if cap exists before allowing user to toggle. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/162802992615.3084999.12539468940404102898.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06dmaengine: xilinx: Add empty device_config functionMarek Vasut1-0/+12
Various DMA users call the dmaengine_slave_config() and expect it to succeed, but that can only succeed if .device_config is implemented. Add empty device_config function rather than patching all the places which use dmaengine_slave_config(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Akinobu Mita <akinobu.mita@gmail.com> Cc: Kedareswara rao Appana <appana.durga.rao@xilinx.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210804195140.61396-1-marex@denx.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06dmaengine: dw: Simplify DT property parserAndy Shevchenko1-28/+16
Since we converted internal data types to match DT, there is no need to have an intermediate conversion layer, hence drop a few conditionals and for loops for good. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Tested-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20210802184355.49879-3-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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