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2015-04-14Merge tag 'staging-4.1-rc1' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging driver updates from Greg KH: "Here's the big staging driver patchset for 4.1-rc1. There's a lot of patches here, the Outreachy application period happened during this development cycle, so that means that there was a lot of cleanup patches accepted. Other than the normal coding style and sparse fixes here, there are some driver updates and work toward making some of the drivers into "mergable" shape (like the Unisys drivers.) All of these have been in linux-next for a while" * tag 'staging-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (1214 commits) staging: lustre: orthography & coding style staging: lustre: lnet: lnet: fix error return code staging: lustre: fix sparse warning Revert "Staging: sm750fb: Fix C99 Comments" Staging: rtl8192u: use correct array for debug output staging: rtl8192e: Remove dead code staging: rtl8192e: Comment cleanup (style/format) staging: rtl8192e: Fix indentation in rtllib_rx_auth_resp() staging: rtl8192e: Decrease nesting of rtllib_rx_auth_resp() staging: rtl8192e: Divide rtllib_rx_auth() staging: rtl8192e: Fix PRINTK_WITHOUT_KERN_LEVEL warnings staging: rtl8192e: Fix DO_WHILE_MACRO_WITH_TRAILING_SEMICOLON warning staging: rtl8192e: Fix BRACES warning staging: rtl8192e: Fix LINE_CONTINUATIONS warning staging: rtl8192e: Fix UNNECESSARY_PARENTHESES warnings staging: rtl8192e: remove unused EXPORT_SYMBOL_RSL macro staging: rtl8192e: Fix RETURN_VOID warnings staging: rtl8192e: Fix UNNECESSARY_ELSE warning staging: rtl8723au: Remove unneeded comments staging: rtl8723au: Use __func__ in trace logs ...
2015-04-14Merge tag 'spi-v4.1' of ↵Linus Torvalds4-1760/+0
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "Only one framework update this time around, a change from Lars-Peter to move full to pm_ops and remove the legacy bus PM ops. Otherwise it's all driver updates: - make the spidev driver complain loudly if registered as spidev with DT rather than with a compatible string, hopefully helping people avoid making that mistake. - error handling and robustness fixes for the Designware and Intel MID drivers from Andy Shevchenko. - substantial performance improvements for the Raspberry Pi driver from Martin Sperl. - several new features for spidev_test from Adrian Remonda and Ian Abbott" * tag 'spi-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (75 commits) spi: bcm2835: enabling polling mode for transfers shorter than 30us spi: bcm2835: transform native-cs to gpio-cs on first spi_setup spi: img-spfi: Control CS lines with GPIO spi: img-spfi: Reset controller after each message spi: img-spfi: Implement a handle_err() callback spi: img-spfi: Setup TRANSACTION register before CONTROL register spi: Make master->handle_err() callback optional to avoid crashes spi: img-spfi: Limit bit clock to 1/4th of input clock spi: img-spfi: Implement a prepare_message() callback spi: fsl-dspi: Add ~50ns delay between cs and sck spi: fsl-dspi: Add cs-sck delays spi: fsl-dspi: Fix clock rate scale values spi: signedness bug in qspi_trigger_transfer_out_int() spi: imx: read back the RX/TX watermark levels earlier spi: spi-bfin5xx: Initialize cr_width in bfin_spi_pump_transfers() spi: bitbang: only toggle bitchanges spi: pxa2xx: missing break in pxa2xx_ssp_get_clk_div() spi: fsl-dspi: Fix clock rate scale values spi: Using Trigger number to transmit/receive data spi: bcm2835: fill FIFO before enabling interrupts to reduce interrupts/message ...
2015-04-12Merge remote-tracking branches 'spi/topic/blackfin', 'spi/topic/cadence', ↵Mark Brown4-1760/+0
'spi/topic/dw' and 'spi/topic/err' into spi-next
2015-04-11Revert "dmaengine: Add a warning for drivers not using the generic slave ↵Linus Torvalds1-3/+0
caps retrieval" This reverts commit ecc19d17868be9c9f8f00ed928791533c420f3e0. It added a new warning to try to encourage driver writers to set the device capabities properly, but drivers haven't been updated and in the meantime it just generaters a scary message that users cannot actually do anything about. Warnings like these are appropriate if you actually expect to fix the code that causes them. They are not appropriate for releases. Requested-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-04-11dmaengine: cppi41: add missing bitfieldsFelipe Balbi1-0/+9
Add missing directions, residue_granularity, srd_addr_widths and dst_addr_widths bitfields. Without those we will see a kernel WARN() when loading musb on am335x devices. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-04-07Merge 4.0-rc7 into staging-nextGreg Kroah-Hartman5-1/+19
We want those fixes (iio primarily) into the -next branch to help with merge and testing issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-03-30dmaengine: moxart-dma: Fix memory leak when stopping a running transferPeter Ujfalusi1-1/+3
The vd->node is removed from the lists when the transfer started so the vchan_get_all_descriptors() will not find it. This results memory leak. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-30dmaengine: bcm2835-dma: Fix memory leak when stopping a running transferPeter Ujfalusi1-0/+1
The vd->node is removed from the lists when the transfer started so the vchan_get_all_descriptors() will not find it. This results memory leak. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-30dmaengine: omap-dma: Fix memory leak when terminating running transferPeter Ujfalusi1-0/+1
In omap_dma_start_desc the vdesc->node is removed from the virt-dma framework managed lists (to be precise from the desc_issued list). If a terminate_all comes before the transfer finishes the omap_desc will not be freed up because it is not in any of the lists and we stopped the DMA channel so the transfer will not going to complete. There is no special sequence for leaking memory when using cyclic (audio) transfer: with every start and stop of a cyclic transfer the driver leaks struct omap_desc worth of memory. Free up the allocated memory directly in omap_dma_terminate_all() since the framework will not going to do that for us. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> CC: <stable@vger.kernel.org> CC: <linux-omap@vger.kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-30dmaengine: edma: fix memory leak when terminating running transfersPetr Kulhavy1-0/+7
If edma_terminate_all() was called while a transfer was running (i.e. after edma_execute() but before edma_callback()) the echan->edesc was not freed. This was due to the fact that a running transfer is on none of the vchan lists: desc_submitted, desc_issued, desc_completed (edma_execute() removes it from the desc_issued list), so the vchan_dma_desc_free_list() called at the end of edma_terminate_all() didn't find it and didn't free it. This bug was found on an AM1808 based hardware (very similar to da850evm, however using the second MMC/SD controller), where intense operations on the SD card wasted the device 128MB RAM within a couple of days. Peter Ujfalusi: The issue is even more severe since it affects cyclic (audio) transfers as well. In this case starting/stopping audio will results memory leak. Signed-off-by: Petr Kulhavy <petr@barix.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> CC: <stable@vger.kernel.org> CC: <linux-omap@vger.kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-30dmaengine: jz4740: Define capabilitiesLars-Peter Clausen1-0/+7
Setup the capabilities of the device/driver, so that users of the DMAengine API can query them. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-23Merge 4.0-rc5 into staging-testingGreg Kroah-Hartman5-80/+137
We want the staging tree fixes that are upstream here as well to prevent merge conflicts from people trying to clean up code. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-03-18dmaengine: pl08x: Define capabilities for generic capabilities reportingMark Brown1-0/+14
Ensure that clients can automatically configure themselves and avoid a nasty warning at boot by providing capability information. Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-17dmaengine: intel-mid-dma: remove the driverAndy Shevchenko4-1760/+0
Since the last and the only user of this driver is converted to use dw_dmac we can remove driver from the tree. Moreover, besides the driver is unmaintained a long time, it serves for the DesignWare DMA IP, for which we have already driver in the tree. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-03-16dmaengine: dw: append MODULE_ALIAS for platform driverAndy Shevchenko1-1/+4
The commit 9cade1a46c77 (dma: dw: split driver to library part and platform code) introduced a separate platform driver but missed to add a MODULE_ALIAS("platform:dw_dmac"); to that module. The patch adds this to get driver loaded automatically if platform device is registered. Reported-by: "Blin, Jerome" <jerome.blin@intel.com> Fixes: 9cade1a46c77 (dma: dw: split driver to library part and platform code) Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-16dmaengine: imx-sdma: switch to dynamic context mode after script loadedRobin Gong1-3/+4
Below comments got from Page4724 of Reference Manual of i.mx6q: http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf --"Static context mode should be used for the first channel called after reset to ensure that the all context RAM for that channel is initialized during the context SAVE phase when the channel is done or yields. Subsequent calls to the same channel or different channels may use any of the dynamic context modes. This will ensure that all context locations for the bootload channel are initialized, and prevent undefined values in context RAM from being loaded during the context restore if the channel is re-started later" Unfortunately, the rule was broken by commit(5b28aa319bba96987316425a1131813d87cbab35) .This patch just take them back. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-13dmaengine: at_hdmac: Fix calculation of the residual bytesTorsten Fleischer2-76/+115
This patch fixes the following issues regarding to the calculation of the residue: 1. The residue is always calculated for the current transfer even if the cookie is associated to a pending transfer. 2. For scatter/gather DMA the calculation of the residue for the current transfer doesn't include the bytes of the child descriptors that are already transferred. It only calculates the difference between the transfer's total length minus the number of bytes that are already transferred for the current child descriptor. For example: There is a scatter/gather DMA transfer with a total length of 1 MByte. Getting the residue several times while the transfer is running shows something like that: 1: residue = 975584 2: residue = 1002766 3: residue = 992627 4: residue = 983767 5: residue = 985694 6: residue = 1008094 7: residue = 1009741 8: residue = 1011195 3. The driver stores the residue but never resets it when starting a new transfer. For example: If there are two subsequent DMA transfers. The first one with a total length of 1 MByte and the second one with a total length of 1 kByte. Getting the residue for both transfers shows something like that: transfer 1: residue = 975584 transfer 2: residue = 1048380 Changes from V1: * Fixed coding style of the multi-line comments. * Improved accuracy of the residue calculation when the transfer for the first descriptor is active. Changes from V2: * Member 'tx_width' of 'struct at_desc' restored, because the transfer width can't be derived from the source width when using "slave_sg". The transfer width is needed for the calculation of the residue if either the transfer of the first or the last descriptor is in progress. In the case of a "memory_to_memory_sg" transfer (part of this patch series) the transfer width of both descriptors may differ. Thus it is required to additionally set 'tx_width' of the last descriptor. * Added functions for multiply used calculations. Signed-off-by: Torsten Fleischer <torfl6749@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-09Merge 4.0-rc3 into staging-nextGreg Kroah-Hartman7-22/+57
We want the staging fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-03-05dmaengine: mmp_pdma: fix warning about slave capsRobert Jarzmik1-0/+7
Fix the dmaengine complaint about missing slave caps : - declare the available bus widths - declare the available transfer types - declare the residue calculation type Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-05dmaengine: qcom_bam_dma: fix wrong register offsetsStanimir Varbanov1-3/+3
The commit fb93f520e (dmaengine: qcom_bam_dma: Generalize BAM register offset calculations) wrongly populated base offsets for event registers for bam v1.4. Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com> Reviewed-by: Archit Taneja <architt@codeaurora.org> Reviewed-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-05dmaengine: bam-dma: fix a warning about missing capabilitiesStanimir Varbanov1-0/+4
Avoid the warning below triggered during dmaengine async device registration. WARNING: CPU: 1 PID: 1 at linux/drivers/dma/dmaengine.c:863 dma_async_device_register+0x2a8/0x4b8() this driver doesn't support generic slave capabilities reporting To do that fill mandatory .directions bit mask, .src/dst_addr_widths and .residue_granularity dma_device fields with appropriate values. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-05dmaengine: ioatdma: workaround for incorrect DMACAP registerDave Jiang1-0/+4
BDX-DE IOATDMA reports incorrect DMACAP register for PQ related ops. Ignoring those bits. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-05dmaengine: at_xdmac: fix for chan conf simplificationLudovic Desroches1-4/+3
When simplificating the channel configuration, the cyclic case has been forgotten. It leads to use bad configuration causing many bugs. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-05dmaengine: dw: don't handle interrupt when dmaengine is not usedJie Yang1-1/+1
When dma controller is not used by any user and set off, we should disble interrupt handler, at least the interrupt reset part, for some subsystem, e.g. ADSP, may use the dma in its own logic, here reset the interrupt may make this subsystem work abnormally. Signed-off-by: Jie Yang <yang.jie@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-04dma: mmp-tdma: refine dma disable and dma-pos updateQiao Zhou1-6/+25
Below are the refinements. 1. Set DMA abort bit when disabling dma channel. This will clear the remaining data in dma FIFO, to fix channel-swap issue. 2. Read DMA HW pointer when updating DMA status. Previously dma position is calculated by adding one period size in dma interrupt. This is inaccurate/insufficient for some high-quality audio APP. Since interrupt bottom half handler has variable schedule delay, it causes big error when calculating sample delay. Read the actual HW pointer and feedback can improve the accuracy. 3. Do some minor code clean. Signed-off-by: Qiao Zhou <zhouqiao@marvell.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-02dmaengine: shdma: Move DMA stop to (runtime) suspend callbacksGeert Uytterhoeven1-8/+7
During system reboot, the sh-dma-engine device may be runtime-suspended, causing a crash: Unhandled fault: imprecise external abort (0x1406) at 0x0002c02c Internal error: : 1406 [#1] SMP ARM ... PC is at sh_dmae_ctl_stop+0x28/0x64 LR is at sh_dmae_ctl_stop+0x24/0x64 If the sh-dma-engine is runtime-suspended, its module clock is turned off, and its registers cannot be accessed. To fix this, move the call to sh_dmae_ctl_stop(), which touches the DMAOR register, to the sh_dmae_suspend() and sh_dmae_runtime_suspend() callbacks. This makes PM operations more symmetric, as both sh_dmae_resume() and sh_dmae_runtime_resume() already call sh_dmae_rst() to re-initialize the DMAOR register. Remove sh_dmae_shutdown(), as it became empty. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-27Staging: drivers: dma: Add space before (Dilek Uzulmez1-1/+1
This patch fixes checkpatch.pl error in file ste_dma40.c ERROR: space required before the open parenthesis '(' Signed-off-by: Dilek Uzulmez <dilekuzulmez@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-02-23dmaenegine: mmp-pdma: fix irq handler overwrite physical chan issueQiao Zhou1-0/+3
Some dma channels may be reserved for other purpose in other layer, like secure driver in EL2/EL3. PDMA driver can see the interrupt status, but it should not try to handle related interrupt, since it doesn't belong to PDMA driver in kernel. These interrupts should be handled by corresponding client/module.Otherwise, it will overwrite illegal memory and cause unexpected issues, since pdma driver only requests resources for pdma channels. In PDMA driver, the reserved channels are at the end of total 32 channels. If we find interrupt bit index is not smaller than total dma channels, we should ignore it. Signed-off-by: Qiao Zhou <zhouqiao@marvell.com> Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-18Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds56-1787/+4543
Pull dmaengine updates from Vinod Koul: "This update brings: - the big cleanup up by Maxime for device control and slave capabilities. This makes the API much cleaner. - new IMG MDC driver by Andrew - new Renesas R-Car Gen2 DMA Controller driver by Laurent along with bunch of fixes on rcar drivers - odd fixes and updates spread over driver" * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (130 commits) dmaengine: pl330: add DMA_PAUSE feature dmaengine: pl330: improve pl330_tx_status() function dmaengine: rcar-dmac: Disable channel 0 when using IOMMU dmaengine: rcar-dmac: Work around descriptor mode IOMMU errata dmaengine: rcar-dmac: Allocate hardware descriptors with DMAC device dmaengine: rcar-dmac: Fix oops due to unintialized list in error ISR dmaengine: rcar-dmac: Fix spinlock issues in interrupt dmaenegine: edma: fix sparse warnings dmaengine: rcar-dmac: Fix uninitialized variable usage dmaengine: shdmac: extend PM methods dmaengine: shdmac: use SET_RUNTIME_PM_OPS() dmaengine: pl330: fix bug that cause start the same descs in cyclic dmaengine: at_xdmac: allow muliple dwidths when doing slave transfers dmaengine: at_xdmac: simplify channel configuration stuff dmaengine: at_xdmac: introduce save_cc field dmaengine: at_xdmac: wait for in-progress transaction to complete after pausing a channel ioat: fail self-test if wait_for_completion times out dmaengine: dw: define DW_DMA_MAX_NR_MASTERS dmaengine: dw: amend description of dma_dev field dmatest: move src_off, dst_off, len inside loop ...
2015-02-17Merge tag 'cleanup-for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "This is a good healthy set of various code removals. Total net delta is 8100 lines removed. Among the larger cleanups are: - Removal of old Samsung S3C DMA infrastructure by Arnd - Removal of the non-DT version of the 'lager' board by Magnus Damm - General stale code removal on OMAP and Davinci by Rickard Strandqvist - Removal of non-DT support on am3517 platforms by Tony Lindgren ... plus several other cleanups of various platforms across the board" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (47 commits) ARM: sirf: drop redundant function and marco declaration arm: omap: specify PMUs are for ARMv7 CPUs arm: shmobile: specify PMUs are for ARMv7 CPUs arm: iop: specify PMUs are for XScale CPUs arm: pxa: specify PMUs are for XScale CPUs arm: realview: specify PMU types ARM: SAMSUNG: remove unused DMA infrastructure ARM: OMAP3: Add back Kconfig option MACH_OMAP3517EVM for ASoC ARM: davinci: Remove CDCE949 driver ARM: at91: remove useless at91rm9200_set_type() ARM: at91: remove useless at91rm9200_dt_initialize() ARM: at91: move debug-macro.S into the common space ARM: at91: remove useless at91_sysirq_mask_rtx ARM: at91: remove useless config MACH_AT91SAM9_DT ARM: at91: remove useless config MACH_AT91RM9200_DT ARM: at91: remove unused mach/memory.h ARM: at91: remove useless header file includes ARM: at91: remove unneeded header file rtc: at91/Kconfig: remove useless options ARM: at91/Documentation: add a README for Atmel SoCs ...
2015-02-16dmaengine: pl330: add DMA_PAUSE featureRobert Baldyga1-0/+28
DMA_PAUSE command is used for halting DMA transfer on chosen channel. It can be useful when we want to safely read residue before terminating all requests on channel. Otherwise there can be situation when some data is transferred before channel termination but after reading residue, which obviously results with data loss. To avoid this situation we can pause channel, read residue and then terminate all requests. This scenario is common, for example, in serial port drivers. Signed-off-by: Robert Baldyga <r.baldyga@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-16dmaengine: pl330: improve pl330_tx_status() functionRobert Baldyga1-2/+72
This patch adds possibility to read residue of DMA transfer. It's useful when we want to know how many bytes have been transferred before we terminate channel. It can take place, for example, on timeout interrupt. Signed-off-by: Lukasz Czerwinski <l.czerwinski@samsung.com> Signed-off-by: Robert Baldyga <r.baldyga@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-16dmaengine: rcar-dmac: Disable channel 0 when using IOMMULaurent Pinchart1-1/+16
A still unconfirmed hardware bug prevents the IPMMU microTLB 0 to be flushed correctly, resulting in memory corruption. DMAC 0 channel 0 is connected to microTLB 0 on currently supported platforms, so we can't use it with the IPMMU. As the IOMMU API operates at the device level we can't disable it selectively, so ignore channel 0 for now if the device is part of an IOMMU group. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-16dmaengine: rcar-dmac: Work around descriptor mode IOMMU errataLaurent Pinchart1-0/+14
When descriptor memory is accessed through an IOMMU the DMADAR register isn't initialized automatically from the first descriptor at beginning of transfer by the DMAC like it should. Initialize it manually with the destination address of the first chunk. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-16dmaengine: rcar-dmac: Allocate hardware descriptors with DMAC deviceLaurent Pinchart1-4/+4
When wired to an IOMMU to access data, the DMAC accesses the hardware descriptors through the IOMMU as well. We're using the DMA mapping API to allocate the descriptors, but with a NULL device at the moment, which prevents IOMMU mappings from being created. Fix this by passing the DMAC device instead. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-16dmaengine: rcar-dmac: Fix oops due to unintialized list in error ISRLaurent Pinchart1-10/+11
The error interrupt handler stops and reinitializes all channels. This causes a crash for channels that have never been used, as their descriptor lists are uninitialized. Fix it by initializing the descriptor lists at probe time. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-16dmaengine: rcar-dmac: Fix spinlock issues in interruptLaurent Pinchart1-4/+4
The rcar_dmac_desc_put() function is called in interrupt context and must thus use spin_lock_irqsave() instead of spin_lock_irq(). Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-16dmaenegine: edma: fix sparse warningsLad, Prabhakar1-1/+2
this patch fixes following sparse warnings: edma.c:537:32: warning: symbol 'edma_prep_dma_memcpy' was not declared. Should it be static? edma.c:1070:6: warning: symbol 'edma_filter_fn' was not declared. Should it be static? Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-12dmaengine: rcar-dmac: Fix uninitialized variable usageLaurent Pinchart1-38/+31
The desc variable is used uninitialized in the rcar_dmac_desc_get() and rcar_dmac_xfer_chunk_get() functions if descriptors need to be allocated. Fix it. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-12dmaengine: shdmac: extend PM methodsSergei Shtylyov1-5/+3
In order to make it possible to restore from hibernation not only in Linux but also in e.g. U-Boot, we have to use sh_dmae_{suspend|resume}() for the {freeze| thaw|restore}() PM methods. It's handy to achieve this with SIMPLE_DEV_PM_OPS() macro; since that macro doesn't do anything when CONFIG_PM_SLEEP is undefined, we don't need to #define sh_dmae_{suspend|resume} NULL anymore but we'll have to enclose sh_dmae_{suspend|resume}() into the new #ifdef... Based on original patch by Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-12dmaengine: shdmac: use SET_RUNTIME_PM_OPS()Sergei Shtylyov1-3/+3
Use SET_RUNTIME_PM_OPS() to initialize the runtime PM method pointers in the 'struct dev_pm_ops'; since that macro doesn't do anything if CONFIG_PM is not defined, we have to move #ifdef up to also cover the runtime PM methods in order to avoid compilation warnings. Based on orignal patch by Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-11dmaengine: pl330: fix bug that cause start the same descs in cyclicAddy Ke1-0/+6
This bug will cause NULL pointer after commit dfac17, and cause wrong package in I2S DMA transfer before commit dfac17. Tested on RK3288-pinky2 board. Detail: I2S DMA transfer(sound/core/pcm_dmaengine.c): dmaengine_pcm_prepare_and_submit --> dmaengine_prep_dma_cyclic --> pl330_prep_dma_cyclic --> the case: 1. pl330_submit_req(desc0): thrd->req[0].desc = desc0, thrd->lstenq = 0 2. pl330_submit_req(desc1): thrd->req[1].desc = desc1, thrd->lstenq = 1 3. _start(desc0) by submit_req: thrd->req_running = 0 because: idx = 1 - thrd->lstenq = 0 4. pl330_update(desc0 OK): thrd->req[0].desc = NULL, desc0 to req_done list because: idx = active = thrd->req_running = 0 5. _start(desc1) by pl330_update: thrd->req_running = 1 because: idx = 1 - thrd->lstenq = 0, but thrd->req[0].desc == NULL, so: idx = thrd->lstenq = 1 6. pl330_submit_req(desc2): thrd->req[0].desc = desc2, thrd->lstenq = 0 7. _start(desc1) by submit_req: thrd->req_running = 1 because: idx = 1 - thrd->lstenq = 1 Note: _start started the same descs _start should start desc2 here, NOT desc1 8. pl330_update(desc1 OK): thrd->req[1].desc = NULL, desc1 to req_done list because: idx = active = thrd->req_running = 1 9. _start(desc2) by pl330_update : thrd->req_running = 0 because: idx = 1 - thrd->lstenq = 0 10.pl330_update(desc1 OK, NOT desc2): thrd->req[0].desc = NULL, desc2 to req_done list because: idx = active = thrd->req_running = 0 11.pl330_submit_req(desc3): thrd->req[0].desc = desc3, thrd->lstenq = 0 12.pl330_submit_req(desc4): thrd->req[1].desc = desc4, thrd->lstenq = 1 13._start(desc3) by submit_req: thrd->req_running = 0 because: idx = 1 - thrd->lstenq = 0 14.pl330_update(desc2 OK NOT desc3): thrd->req[0].desc = NULL desc3 to req_done list because: idx = active = thrd->req_running = 0 15._start(desc4) by pl330_update: thrd->req_running = 1 because: idx = 1 - thrd->lstenq = 0, but thrd->req[0].desc == NULL, so: idx = thrd->lstenq = 1 16.pl330_submit_req(desc5): thrd->req[0].desc = desc5, thrd->lstenq = 0 17._start(desc4) by submit_req: thrd->req_running = 1 because: idx = 1 - thrd->lstenq = 1 18.pl330_update(desc3 OK NOT desc4): thrd->req[1].desc = NULL desc4 to req_done list because: idx = active = thrd->req_running = 1 19._start(desc4) by pl330_update: thrd->req_running = 0 because: idx = 1 - thrd->lstenq = 1, but thrd->req[1].desc == NULL, so: idx = thrd->lstenq = 0 20.pl330_update(desc4 OK): thrd->req[0].desc = NULL, desc5 to req_done list because: idx = active = thrd->req_running = 0 21.pl330_update(desc4 OK): 1) before commit dfac17(set req_running -1 in pl330_update/mark_free()): because: active = -1, abort result: desc0-desc5's callback are all called, but step 10 and step 18 go wrong. 2) before commit dfac17: idx = active = thrd->req_runnig = 0 --> descdone = thrd->req[0] = NULL --> list_add_tail(&descdone->rqd, &pl330->req_done); --> got NULL pointer!!! Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-05resources: Move struct resource_list_entry from ACPI into resource coreJiang Liu1-5/+5
Currently ACPI, PCI and pnp all implement the same resource list management with different data structure. We need to transfer from one data structure into another when passing resources from one subsystem into another subsystem. So move struct resource_list_entry from ACPI into resource core and rename it as resource_entry, then it could be reused by different subystems and avoid the data structure conversion. Introduce dedicated header file resource_ext.h instead of embedding it into ioport.h to avoid header file inclusion order issues. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-02-05dmaengine: at_xdmac: allow muliple dwidths when doing slave transfersLudovic Desroches1-5/+10
When using FIFO, we need to support differents data width in a single transfer. For example, serial device which usually uses 1-byte data width will use 4-bytes data width when using the FIFO. If the transfer size is not aligned on 4-bytes then the end of the transfer will be performed with 1-byte data-width. For that reason, at_xdmac_prep_slave_sg() now builds linked list descriptors using view 2 instead of view 1 so each of them can update the DWIDTH field into the Channel Configuration Register. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-05dmaengine: at_xdmac: simplify channel configuration stuffLudovic Desroches1-22/+14
This patch simplifies the channel configuration register management. Relying on a "software snapshot" of the configuration is not safe and too complex. Multiple dwidths will be introduced for slave transfers. In this case, it becomes quite difficult to have an accurate snapshot of the channel configuration register in the way it is done. Using the channel configuration available in the lli descriptor simplifies this stuff. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-05dmaengine: at_xdmac: introduce save_cc fieldLudovic Desroches1-3/+3
When suspending the device, read the channel configuration directly from the register instead of relying on a software snapshot, it will be safer. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-05dmaengine: at_xdmac: wait for in-progress transaction to complete after ↵Cyrille Pitchen1-1/+6
pausing a channel Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-05ioat: fail self-test if wait_for_completion times outNicholas Mc Guire1-3/+6
wait_for_completion_timeout reaching timeout was being ignored, fail the self-test if timeout condition occurs. v2: fixup of coding style issues. Signed-off-by: Nicholas Mc Guire <der.herr@hofr.at> Acked-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Prarit Bhargava <prarit@redhat.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-05dmaengine: dw: define DW_DMA_MAX_NR_MASTERSAndy Shevchenko3-4/+5
Instead of using magic number in the code the patch provides DW_DMA_MAX_NR_MASTERS constant. While here, restrict the reading of data width array by amount of the actual number of AHB masters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-02-05dmatest: move src_off, dst_off, len inside loopAndy Shevchenko1-11/+12
The scope of those varsiables is in while-loop. This patch moves them there and removes duplicate code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>