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path: root/drivers/clocksource
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2013-09-02clocksource: armada-370-xp: Introduce new compatiblesEzequiel Garcia1-15/+39
The Armada XP SoC clocksource driver cannot work without the 25 MHz fixed timer. Therefore it's appropriate to introduce a new compatible string and use it to set the 25 MHz fixed timer. The 'marvell,timer-25MHz' property will be marked as deprecated. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
2013-09-02clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLAREEzequiel Garcia1-3/+3
This is almost cosmetic: we achieve a bit of consistency with other clocksource drivers by using the CLOCKSOURCE_OF_DECLARE macro for the boilerplate code. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
2013-09-02clocksource: armada-370-xp: Simplify TIMER_CTRL register accessEzequiel Garcia1-39/+30
This commit creates two functions to access the TIMER_CTRL register: one for global one for the per-cpu. This makes the code much more readable. In addition, since the TIMER_CTRL register is also used for watchdog, this is preparation work for future thread-safe improvements. Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-09-02clocksource: armada-370-xp: Use BIT()Ezequiel Garcia1-6/+6
This is a purely cosmetic commit: we replace hardcoded values that representing bits by BIT(), which is slightly more readable. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
2013-08-27treewide: Fix printks with 0x%#Joe Perches1-2/+2
Using 0x%# emits 0x0x. Only one is necessary. Signed-off-by: Joe Perches <joe@perches.com> Acked-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2013-08-22ARM: nomadik: add dynamic irq flag to the timerDaniel Lezcano1-1/+2
Add the dynamic irq affinity feature to the timer clock device. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Vincent Guittot <vincent.guittot@linaro.org> Acked-by: Rickard Andersson <rickard.andersson@stericsson.com>
2013-08-22clocksource: sh_cmt: 32-bit control register supportMagnus Damm1-14/+36
Add support for CMT hardware with 32-bit control and counter registers, as found on r8a73a4 and r8a7790. To use the CMT with 32-bit hardware a second I/O memory resource needs to point out the CMSTR register and it needs to be 32 bit wide. Signed-off-by: Magnus Damm <damm@opensource.se> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-08-22clocksource: em_sti: Convert to devm_* managed helpersLaurent Pinchart1-35/+14
Replace kzalloc, clk_get, ioremap and request_irq by their managed counterparts to simplify error paths. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-08-21Merge branch 'timers/clockevents-next' of ↵Thomas Gleixner2-69/+379
git://git.linaro.org/people/dlezcano/clockevents into timers/core * Support for memory mapped arch_timers * Trivial fixes to the moxart timer code * Documentation updates Trivial conflicts in drivers/clocksource/arm_arch_timer.c. Fixed up the newly added __cpuinit annotations as well. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-08-21Merge branch 'linus' into timers/coreThomas Gleixner7-20/+20
Reason: Get upstream changes on which new patches depend on. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-08-20ARM: DT: binding fixup to align with vendor-prefixes.txt (drivers)Christian Daudt1-1/+7
[ this is a follow-up to this discussion: http://archive.arm.linux.org.uk/lurker/message/20130730.230827.a1ceb12a.en.html ] This patchset renames all uses of "bcm," name bindings to "brcm," as they were done prior to knowing that brcm had already been standardized as Broadcom vendor prefix (in Documentation/devicetree/bindings/vendor-prefixes.txt). This will not cause any churn on devices because none of these bindings have made it into production yet. Signed-off-by: Christian Daudt <csd@broadcom.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2013-08-14Merge tag 'v3.12-pwm-cleanup-for-olof' of git://github.com/tom3q/linux into ↵Olof Johansson2-50/+59
next/cleanup From Tomasz Figa: Here is the Samsung PWM cleanup series. Particular patches of the series involve following modifications: - fixing up few things in samsung_pwm_timer clocksource driver, - moving remaining Samsung platforms to the new clocksource driver, - removing old clocksource driver, - adding new multiplatform- and DT-aware PWM driver, - moving all Samsung platforms to use the new PWM driver, - removing old PWM driver, - removing all PWM-related code that is not used anymore. * tag 'v3.12-pwm-cleanup-for-olof' of git://github.com/tom3q/linux: (684 commits) ARM: SAMSUNG: Remove plat/regs-timer.h header ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header ARM: SAMSUNG: Remove pwm-clock infrastructure ARM: SAMSUNG: Remove old PWM timer platform devices pwm: Remove superseded pwm-samsung-legacy driver ARM: SAMSUNG: Modify board files to use new PWM platform device ARM: SAMSUNG: Rework private data handling in dev-backlight pwm: Add new pwm-samsung driver pwm: samsung: Rename to pwm-samsung-legacy ARM: SAMSUNG: Remove unused PWM timer IRQ chip code ARM: SAMSUNG: Remove old samsung-time driver ARM: SAMSUNG: Move all platforms to new clocksource driver ARM: SAMSUNG: Set PWM platform data ARM: SAMSUNG: Add new PWM platform device ARM: SAMSUNG: Unify base address definitions of timer block clocksource: samsung_pwm_timer: Handle suspend/resume correctly clocksource: samsung_pwm_timer: Do not use clocksource_mmio clocksource: samsung_pwm_timer: Cache clocksource register address clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit clocksource: samsung_pwm_timer: Do not request PWM mem region + v3.11-rc4 Conflicts: arch/arm/Kconfig.debug Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-06clocksource: samsung_pwm_timer: Handle suspend/resume correctlyTomasz Figa1-14/+28
Current suspend/resume handling of the driver was broken, because: - periodic timer was being enabled in CLOCK_EVT_MODE_RESUME mode, which does not seem to be correct behavior looking at other platforms, - PWM divisors need to be restored, but they were not, - clockevent interrupt mask needs to be restored, but it was not, - clocksource was being restored in clockevent resume callback. This patch fixes issues mentioned above, making suspend/resume handling in the driver correct. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-08-06clocksource: samsung_pwm_timer: Do not use clocksource_mmioTomasz Figa2-5/+15
In case of Samsung PWM timer, clocksource MMIO can not be used, because custom suspend/resume callbacks are required. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-08-06clocksource: samsung_pwm_timer: Cache clocksource register addressTomasz Figa1-25/+8
Instead of calculating register every time the timer should be read, we can just do it one time at initialization and store the address in driver data. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-08-06clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bitTomasz Figa1-1/+12
PWM channel 4 has its autoreload bit located at different position. This patch fixes the driver to account for that. This fixes a problem with the clocksource hanging after it overflows because it is not reloaded any more. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-08-06clocksource: samsung_pwm_timer: Do not request PWM mem regionTomasz Figa1-10/+1
PWM registers are shared between clocksource and PWM drivers and so can not be claimed for exclusive use. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-08-01clocksource: arch_timer: Add support for memory mapped timersStephen Boyd1-55/+347
Add support for the memory mapped timers by filling in the read/write functions and adding some parsing code. Note that we only register one clocksource, preferring the cp15 based clocksource over the mmio one. To keep things simple we register one global clockevent. This covers the case of UP and SMP systems with only mmio hardware and systems where the memory mapped timers are used as the broadcast timer in low power modes. The DT binding allows for per-CPU memory mapped timers in case we want to support that in the future, but the code isn't added here. We also don't do much for hypervisor support, although it should be possible to support it by searching for at least two frames where one frame has the virtual capability and then updating KVM timers to support it. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <Marc.Zyngier@arm.com> Cc: Rob Herring <robherring2@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com>
2013-08-01clocksource: arch_timer: Push the read/write wrappers deeperStephen Boyd1-15/+31
We're going to introduce support to read and write the memory mapped timer registers in the next patch, so push the cp15 read/write functions one level deeper. This simplifies the next patch and makes it clearer what's going on. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <Marc.Zyngier@arm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com>
2013-08-01clocksource: arch_timer: Pass clock event to set_mode callbackStephen Boyd1-1/+1
There isn't any reason why we don't pass the event here and we'll need it in the near future for memory mapped arch timers anyway. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <Marc.Zyngier@arm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com>
2013-08-01clocksource: arch_timer: Make register accessors less error-proneStephen Boyd1-3/+3
Using an enum for the register we wish to access allows newer compilers to determine if we've forgotten a case in our switch statement. This allows us to remove the BUILD_BUG() instances in the arm64 port, avoiding problems where optimizations may not happen. To try and force better code generation we're currently marking the accessor functions as inline, but newer compilers can ignore the inline keyword unless it's marked __always_inline. Luckily on arm and arm64 inline is __always_inline, but let's make everything __always_inline to be explicit. Suggested-by: Thomas Gleixner <tglx@linutronix.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <Marc.Zyngier@arm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com>
2013-08-01ARM: clocksource: moxart: Add bitops.h includeJonas Jensen1-0/+1
bitops.h included implicitly, add #include <linux/bitops.h> Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-30clocksource: vf_pit_timer: Switch to sched_clock_register()Stephen Boyd1-2/+2
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Jingchang Lu <b35083@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-07-30clocksource: sirf: Switch to sched_clock_register() and use 64 bitsStephen Boyd1-3/+3
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface and use all 64 bits of this timer. Cc: Barry Song <Baohua.Song@csr.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-07-30clocksource: time-armada-370-xp: Switch to sched_clock_register()Stephen Boyd1-2/+2
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-07-30clocksource: tegra: Switch to sched_clock_register()Stephen Boyd1-2/+2
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-07-30clocksource: samsung_pwm_timer: Switch to sched_clock_register()Stephen Boyd1-2/+2
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Tomasz Figa <t.figa@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-07-30clocksource: nomadik: Switch to sched_clock_register()Stephen Boyd1-2/+2
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-07-30clocksource: mxs_timer: Switch to sched_clock_register()Stephen Boyd1-2/+2
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Shawn Guo <shawn.guo@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-07-30clocksource: dw_apb_timer_of: Switch to sched_clock_register()Stephen Boyd1-2/+2
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-07-30clocksource: dbx500-prcmu: Switch to sched_clock_register()Stephen Boyd1-3/+2
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-07-30clocksource: bcm2835: Switch to sched_clock_register()Stephen Boyd1-2/+2
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-07-24Merge tag 'remove-local-timers' of ↵Olof Johansson3-110/+138
git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/cleanup From Stephen Boyd: Now that we have a generic arch hook for broadcast we can remove the local timer API entirely. Doing so will reduce code in ARM core, reduce the architecture dependencies of our timer drivers, and simplify the code because we no longer go through an architecture layer that is essentially a hotplug notifier. * tag 'remove-local-timers' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm: ARM: smp: Remove local timer API clocksource: time-armada-370-xp: Divorce from local timer API clocksource: time-armada-370-xp: Fix sparse warning ARM: msm: Divorce msm_timer from local timer API ARM: PRIMA2: Divorce timer-marco from local timer API ARM: EXYNOS4: Divorce mct from local timer API ARM: OMAP2+: Divorce from local timer API ARM: smp_twd: Divorce smp_twd from local timer API ARM: smp: Remove duplicate dummy timer implementation Resolved a large number of conflicts due to __cpuinit cleanups, etc. Signed-off-by: Olof Johansson <olof@lixom.net>
2013-07-18ARM: clocksource: Add support for MOXA ART SoCsJonas Jensen2-0/+165
This patch adds an clocksource driver for the main timer(s) found on MOXA ART SoCs. The MOXA ART SoC provides three separate timers with individual count/load/match registers, two are used here: TIMER1: clockevents, used to support oneshot and periodic events TIMER2: set up as a free running counter, used as clocksource Timers are preconfigured by bootloader to count down and interrupt on match or zero. Count increments every APB clock cycle and is automatically reloaded when it reaches zero. Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: cadence_ttc: Reuse clocksource as sched_clockSoren Brinkmann1-0/+12
Reuse the TTC clocksource timer as sched clock provider. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Michal Simek <monstr@monstr.eu>
2013-07-18clocksource: cadence_ttc: Remove unused headerSoren Brinkmann1-1/+0
The clk-provider.h header is not required by this driver. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: sun4i: Fix bug when switching from periodic to oneshot modesMaxime Ripard1-3/+6
The interval was firing at was set up at probe time, and only changed in the set_next_event, and never changed back, which is not really what is expected. When enabling the periodic mode, now set an interval to tick every jiffy. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: sun4i: Cleanup parent clock setupMaxime Ripard1-10/+5
The current bring-up code for the timer was overly complicated. The only thing we need is actually which clock we want to use as source and that's pretty much all. Let's keep it that way. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: sun4i: Remove TIMER_SCAL variableMaxime Ripard1-6/+3
The prescaler is only used when using the internal low frequency oscillator (at 32kHz). Since we're using the higher frequency oscillator at 24MHz, we can just remove it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: sun4i: Factor out some timer codeMaxime Ripard1-16/+32
The set_next_event and set_mode callbacks share a lot of common code we can easily factor to avoid duplication and mistakes. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: sun4i: Fix the next event codeMaxime Ripard1-3/+22
The next_event logic was setting the next interval to fire in the current timer value instead of the interval value register, which is obviously wrong. Plus, the logic to set the actual value was wrong as well: the interval register can only be modified when the timer is disabled, and then enable it back, otherwise, it'll have no effect. Fix this logic as well since that code couldn't possibly work. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: sun4i: Don't forget to enable the clock we useMaxime Ripard1-0/+1
Even if in our case, this clock was non-gatable, used as a parent clock for several IPs, it still is a good idea to enable it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: sun4i: Add clocksource and sched clock driversMaxime Ripard1-0/+15
Use the second timer found on the Allwinner SoCs as a clock source and sched clock, that were both not used yet on these platforms. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: sun4i: rename AUTORELOAD define to RELOADMaxime Ripard1-2/+2
The name AUTORELOAD was actually pretty bad since it doesn't make the register reload the previous interval when it expires, but setting this value pushes the new programmed interval to the internal timer counter. Rename it to RELOAD instead. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: sun4i: Wrap macros arguments in parenthesisMaxime Ripard1-2/+2
The macros were not using parenthesis to escape the arguments passed to them. It is pretty unsafe, so add those parenthesis. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: sun4i: Use the BIT macros where possibleMaxime Ripard1-4/+4
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18clocksource: orion: Use linux/sched_clock.hStephen Boyd1-1/+1
The sched_clock.h include is under include/linux now. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-07-15clocksource+irqchip: delete __cpuinit usage from all related filesPaul Gortmaker7-20/+20
The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. This removes all the drivers/clocksource and drivers/irqchip uses of the __cpuinit macros from all C files. [1] https://lkml.org/lkml/2013/5/20/589 Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-07-12Merge branch 'timers/clockevents' of ↵Thomas Gleixner4-0/+491
git://git.linaro.org/people/dlezcano/clockevents into timers/urgent * New clocksource drivers for ARM SoCs to share
2013-07-07Merge branch 'timers-core-for-linus' of ↵Linus Torvalds16-26/+497
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer core updates from Thomas Gleixner: "The timer changes contain: - posix timer code consolidation and fixes for odd corner cases - sched_clock implementation moved from ARM to core code to avoid duplication by other architectures - alarm timer updates - clocksource and clockevents unregistration facilities - clocksource/events support for new hardware - precise nanoseconds RTC readout (Xen feature) - generic support for Xen suspend/resume oddities - the usual lot of fixes and cleanups all over the place The parts which touch other areas (ARM/XEN) have been coordinated with the relevant maintainers. Though this results in an handful of trivial to solve merge conflicts, which we preferred over nasty cross tree merge dependencies. The patches which have been committed in the last few days are bug fixes plus the posix timer lot. The latter was in akpms queue and next for quite some time; they just got forgotten and Frederic collected them last minute." * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits) hrtimer: Remove unused variable hrtimers: Move SMP function call to thread context clocksource: Reselect clocksource when watchdog validated high-res capability posix-cpu-timers: don't account cpu timer after stopped thread runtime accounting posix_timers: fix racy timer delta caching on task exit posix-timers: correctly get dying task time sample in posix_cpu_timer_schedule() selftests: add basic posix timers selftests posix_cpu_timers: consolidate expired timers check posix_cpu_timers: consolidate timer list cleanups posix_cpu_timer: consolidate expiry time type tick: Sanitize broadcast control logic tick: Prevent uncontrolled switch to oneshot mode tick: Make oneshot broadcast robust vs. CPU offlining x86: xen: Sync the CMOS RTC as well as the Xen wallclock x86: xen: Sync the wallclock when the system time is set timekeeping: Indicate that clock was set in the pvclock gtod notifier timekeeping: Pass flags instead of multiple bools to timekeeping_update() xen: Remove clock_was_set() call in the resume path hrtimers: Support resuming with two or more CPUs online (but stopped) timer: Fix jiffies wrap behavior of round_jiffies_common() ...
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