index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
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path:
root
/
drivers
/
clk
Age
Commit message (
Expand
)
Author
Files
Lines
2021-06-28
drivers: ti: remove redundant error message in adpll.c
Yu Jiahua
1
-4
/
+1
2021-06-28
clk: st: clkgen-fsyn: embed soc clock outputs within compatible data
Alain Volmat
1
-12
/
+101
2021-06-28
clk: st: clkgen-pll: embed soc clock outputs within compatible data
Alain Volmat
1
-14
/
+106
2021-06-28
clk: st: flexgen: embed soc clock outputs within compatible data
Alain Volmat
1
-14
/
+353
2021-06-28
clk: st: clkgen-pll: remove unused variable of struct clkgen_pll
Alain Volmat
1
-1
/
+0
2021-06-28
clk: ingenic: Add support for the JZ4760
Paul Cercueil
4
-0
/
+441
2021-06-28
clk: ingenic: Support overriding PLLs M/N/OD calc algorithm
Paul Cercueil
2
-13
/
+30
2021-06-28
clk: ingenic: Remove pll_info.no_bypass_bit
Paul Cercueil
3
-8
/
+6
2021-06-28
clk: ingenic: Read bypass register only when there is one
Paul Cercueil
1
-8
/
+11
2021-06-28
clk: Support bypassing dividers
Paul Cercueil
5
-29
/
+42
2021-06-28
clk: qcom: clk-alpha-pll: fix CAL_L write in alpha_pll_fabia_prepare
Jonathan Marek
1
-1
/
+1
2021-06-28
clk: actions: Add NIC and ETHERNET clock support for Actions S500 SoC
Cristian Ciocaltea
1
-1
/
+16
2021-06-28
clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC
Cristian Ciocaltea
1
-8
/
+11
2021-06-28
clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC
Cristian Ciocaltea
1
-15
/
+29
2021-06-28
clk: actions: Fix SD clocks factor table on Owl S500 SoC
Cristian Ciocaltea
1
-4
/
+2
2021-06-28
clk: actions: Fix UART clock dividers on Owl S500 SoC
Cristian Ciocaltea
1
-6
/
+6
2021-06-28
clk: bd718xx: Drop BD70528 support
Matti Vaittinen
2
-12
/
+5
2021-06-28
clk: stm32mp1: move RCC reset controller into RCC clock driver
Gabriel Fernandez
1
-13
/
+144
2021-06-28
clk: stm32mp1: convert to module driver
Gabriel Fernandez
1
-43
/
+78
2021-06-28
clk: stm32mp1: remove intermediate pll clocks
Gabriel Fernandez
1
-23
/
+42
2021-06-28
clk: stm32mp1: merge 'ck_hse_rtc' and 'ck_rtc' into one clock
Gabriel Fernandez
1
-6
/
+48
2021-06-28
clk: stm32mp1: merge 'clk-hsi-div' and 'ck_hsi' into one clock
Gabriel Fernandez
1
-5
/
+5
2021-06-28
clk: lmk04832: add support for digital delay
Liam Beguin
1
-6
/
+315
2021-06-28
clk: add support for the lmk04832
Liam Beguin
3
-0
/
+1296
2021-06-28
clk: socfpga: clk-pll: Remove unused variable 'rc'
Jian Xin
1
-2
/
+1
2021-06-28
clk: qcom: Add camera clock controller driver for SM8250
Jonathan Marek
3
-0
/
+2464
2021-06-28
clk: qcom: clk-alpha-pll: add support for zonda pll
Jonathan Marek
2
-0
/
+180
2021-06-28
clk/qcom: Remove unused variables
Pu Lehui
1
-23
/
+0
2021-06-28
clk: qcom: smd-rpmcc: Add support for MSM8226 rpm clocks
Bartosz Dudziak
1
-0
/
+1
2021-06-28
clk: qcom: gcc: Add support for Global Clock controller found on MSM8226
Bartosz Dudziak
1
-7
/
+162
2021-06-28
clk: qcom: Add SM6125 (TRINKET) GCC driver
Konrad Dybcio
3
-0
/
+4198
2021-06-28
clk: qcom: gcc: Add support for a new frequency for SC7280
Taniya Das
1
-0
/
+1
2021-06-28
clk: agilex/stratix10/n5x: fix how the bypass_reg is handled
Dinh Nguyen
1
-3
/
+8
2021-06-28
clk: agilex/stratix10: add support for the 2nd bypass
Dinh Nguyen
3
-2
/
+123
2021-06-28
clk: agilex/stratix10: fix bypass representation
Dinh Nguyen
2
-21
/
+91
2021-06-28
clk: agilex/stratix10: remove noc_clk
Dinh Nguyen
2
-34
/
+30
2021-06-26
clk: tegra: clk-tegra124-dfll-fcpu: don't use devm functions for regulator
Alexandru Ardelean
1
-2
/
+2
2021-06-26
clk: zynqmp: pll: Remove some dead code
Christophe JAILLET
1
-2
/
+0
2021-06-26
clk: zynqmp: fix compile testing without ZYNQMP_FIRMWARE
Michal Simek
2
-8
/
+24
2021-06-23
clk: keystone: syscon-clk: Add support for AM64 specific epwm-tbclk
Lokesh Vutla
1
-0
/
+17
2021-06-14
clk: imx8mq: remove SYS PLL 1/2 clock gates
Lucas Stach
1
-38
/
+18
2021-06-14
clk: imx: scu: Do not enable runtime PM for CPU clks
Nitin Garg
1
-12
/
+18
2021-06-14
clk: imx: scu: add parent save and restore
Dong Aisheng
1
-1
/
+28
2021-06-14
clk: imx: scu: Only save DC SS clock using non-cached clock rate
Anson Huang
1
-1
/
+8
2021-06-14
clk: imx: scu: Add A72 frequency scaling support
Anson Huang
1
-1
/
+3
2021-06-14
clk: imx: scu: Add A53 frequency scaling support
Anson Huang
1
-2
/
+2
2021-06-14
clk: imx: scu: bypass pi_pll enable status restore
Dong Aisheng
1
-1
/
+1
2021-06-14
clk: imx: scu: detach pd if can't power up
Dong Aisheng
1
-0
/
+1
2021-06-14
clk: imx: scu: bypass cpu clock save and restore
Dong Aisheng
1
-0
/
+10
2021-06-14
clk: imx: scu: add parallel port clock ops
Guoniu.zhou
1
-0
/
+8
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