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path: root/drivers/clk/zynq/pll.c
AgeCommit message (Expand)AuthorFilesLines
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 401Thomas Gleixner1-13/+1
2019-04-23clk: core: replace clk_{readl,writel} with {readl,writel}Jonas Gorski1-9/+9
2014-09-09clk: zynq: Remove unnecessary OOM messageSoren Brinkmann1-3/+1
2014-02-26clk: zynq: Use clk_readl/clk_writel helper functionMichal Simek1-9/+9
2013-08-20clk/zynq/pll: Use #defines for fbdiv min/max valuesSoren Brinkmann1-4/+7
2013-08-20clk/zynq/pll: Fix documentation for PLL register functionSoren Brinkmann1-1/+7
2013-05-21clk: zynq: Factor out PLL driverSoren Brinkmann1-0/+235