starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2015-02-18	clk: Replace explicit clk assignment with __clk_hw_set_clk	Javier Martinez Canillas	1	-7/+7
2015-02-02	clk: tegra: Define PLLD_DSI and remove dsia(b)_mux	Mark Zhang	4	-26/+24
2015-02-02	clk: tegra: Add support for the Tegra132 CAR IP block	Paul Walmsley	3	-12/+129
2015-02-02	clk: tegra: make tegra_clocks_apply_init_table() arch_initcall	Peter De Schrijver	1	-2/+5
2015-02-02	clk: tegra: Fix order of arguments in WARN	Tomeu Vizoso	1	-4/+4
2015-02-02	clk: tegra124: Add init data for dsi lp clocks	Sean Paul	1	-0/+2
2015-02-02	clk: tegra: SDMMC controllers are on APB	Andrew Bresticker	1	-8/+8
2014-11-26	clk: tegra: Implement memory-controller clock	Thierry Reding	6	-4/+40
2014-09-18	clk: tegra: Make clock initialization more robust	Tomeu Vizoso	1	-2/+7
2014-09-18	clk: tegra124: Add PLL_M_UD and PLL_C_UD clocks	Mikko Perttunen	1	-0/+8
2014-08-08	Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git...	Linus Torvalds	3	-3/+8
2014-07-17	ARM: tegra: Convert PMC to a driver	Thierry Reding	1	-1/+1
2014-07-17	ARM: tegra: Move includes to include/soc/tegra	Thierry Reding	3	-3/+8
2014-07-08	clk: tegra: Use XUSB-compatible SATA PLL sequence	Mikko Perttunen	1	-0/+11
2014-06-30	clk: tegra: export clock names for debugging	Peter De Schrijver	1	-0/+6
2014-06-27	clk: tegra124: init table updates	Peter De Schrijver	1	-0/+6
2014-06-25	clk: tegra: Add SATA clocks to Tegra124 initialization table	Mikko Perttunen	1	-0/+2
2014-06-25	clk: tegra: Enable hardware control of SATA PLL	Mikko Perttunen	1	-0/+8
2014-06-25	clk: tegra: fix vi_sensor clocks on Tegra124	Peter De Schrijver	3	-4/+33
2014-05-28	Merge branch 'clk-fixes' into clk-next	Mike Turquette	1	-21/+43
2014-05-28	Merge tag 'clk-tegra-fixes-3.15' of git://nv-tegra.nvidia.com/user/pdeschrijv...	Mike Turquette	1	-21/+43
2014-05-23	clk: tegra: Initialize xusb clocks	Andrew Bresticker	2	-1/+12
2014-05-23	clk: tegra: Fix xusb_hs_src clock hierarchy	Andrew Bresticker	4	-20/+17
2014-05-23	clk: tegra: Fix xusb_fs_src mux	Jim Lin	1	-1/+3
2014-05-23	clk: tegra: Enable hardware control of PLLE	Jim Lin	1	-1/+32
2014-05-17	clk: tegra: Fix wrong value written to PLLE_AUX	Tuomas Tynkkynen	1	-1/+1
2014-04-24	clk: tegra: remove non-existent clocks	Stephen Warren	1	-3/+0
2014-04-17	clk: tegra: Fix enabling of PLLE	Thierry Reding	1	-1/+1
2014-04-17	clk: tegra: Introduce divider mask and shift helpers	Thierry Reding	1	-20/+24
2014-04-17	clk: tegra: Fix PLLE programming	Thierry Reding	1	-6/+24
2014-02-25	Merge branch 'clk-fixes' into clk-next	Mike Turquette	7	-31/+45
2014-02-24	clk: tegra: Staticize tegra_clk_periph_no_gate_ops	Sachin Kamat	1	-1/+1
2014-02-20	clk: tegra124: remove gr2d and gr3d clocks	Peter De Schrijver	1	-2/+0
2014-02-20	clk: tegra: Fix vic03 mux index	Peter De Schrijver	1	-3/+1
2014-02-17	clk: tegra: use max divider if divider overflows	Andrew Bresticker	1	-1/+1
2014-02-17	clk: tegra: cclk_lp has a pllx/2 divider	Andrew Bresticker	1	-1/+1
2014-02-17	clk: tegra: fix sdmmc clks on Tegra1x4	Andrew Bresticker	4	-8/+16
2014-02-17	clk: tegra: fix host1x clock on Tegra124	Mark Zhang	1	-1/+1
2014-02-17	clk: tegra: PLLD2 fixes for hdmi	David Ung	1	-8/+7
2014-02-17	clk: tegra: Fix PLLD mnp table	Rhyland Klein	1	-1/+10
2014-02-17	clk: tegra: Fix PLLP rate table	Gabe Black	1	-5/+5
2014-02-17	clk: tegra: Correct clock number for UARTE	Thierry Reding	1	-1/+1
2014-02-17	clk: tegra: Add missing Tegra20 fuse clks	Peter De Schrijver	1	-0/+2
2014-01-24	Merge tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turq...	Linus Torvalds	2	-7/+7
2013-12-20	clk: tegra: Staticize tegra_clk_periph_nodiv_ops	Sachin Kamat	1	-1/+1
2013-12-20	clk: tegra: Staticize local variables in clk-pll.c	Sachin Kamat	1	-6/+6
2013-12-12	clk: tegra: remove bogus PCIE_XCLK	Stephen Warren	2	-13/+0
2013-12-12	clk: tegra: remove legacy reset APIs	Stephen Warren	3	-63/+0
2013-12-12	clk: tegra: implement a reset driver	Stephen Warren	6	-6/+57
2013-11-28	clk: tegra: fix __clk_lookup() return value checks	Wei Yongjun	1	-4/+4