index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
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log
tree
commit
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log msg
author
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path:
root
/
drivers
/
clk
/
tegra
Age
Commit message (
Expand
)
Author
Files
Lines
2016-06-30
clk: tegra: Initialize UTMI PLL when enabling PLLU
Andrew Bresticker
6
-598
/
+531
2016-06-23
clk: tegra: Micro-optimize Tegra210 clock setup
Thierry Reding
1
-4
/
+4
2016-06-23
clk: tegra: Make sor_safe the parent of dpaux and dpaux1
Thierry Reding
1
-2
/
+2
2016-06-22
clk: tegra: Mark timer clock as critical
Thierry Reding
1
-1
/
+1
2016-06-17
clk: tegra: Enable sor1 and sor1_src on Tegra210
Thierry Reding
1
-0
/
+2
2016-06-17
clk: tegra: Squash sor1 safe/brick/src into a single mux
Thierry Reding
2
-12
/
+12
2016-06-17
clk: tegra: Disable spread spectrum on pll_d2
Thierry Reding
1
-2
/
+3
2016-06-10
clk: tegra: Fixup post dividers on Tegra210
Thierry Reding
1
-47
/
+47
2016-05-28
remove lots of IS_ERR_VALUE abuses
Arnd Bergmann
1
-1
/
+1
2016-05-21
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
19
-114
/
+369
2016-05-18
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/a...
Linus Torvalds
1
-0
/
+58
2016-05-09
Merge tag 'tegra-for-4.7-phy' of git://git.kernel.org/pub/scm/linux/kernel/gi...
Arnd Bergmann
1
-0
/
+58
2016-05-03
Merge tag 'tegra-for-4.7-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi...
Stephen Boyd
19
-114
/
+427
2016-04-28
clk: tegra: dfll: Reformat CVB frequency table
Thierry Reding
1
-25
/
+25
2016-04-28
clk: tegra: dfll: Properly clean up on failure and removal
Thierry Reding
4
-4
/
+48
2016-04-28
clk: tegra: dfll: Make code more comprehensible
Thierry Reding
3
-41
/
+37
2016-04-28
clk: tegra: dfll: Reference CVB table instead of copying data
Thierry Reding
3
-27
/
+17
2016-04-28
clk: tegra: dfll: Update kerneldoc
Thierry Reding
1
-5
/
+5
2016-04-28
clk: tegra: Fix PLL_U post divider and initial rate on Tegra30
Lucas Stach
1
-5
/
+6
2016-04-28
clk: tegra: Initialize PLL_C to sane rate on Tegra30
Lucas Stach
1
-0
/
+1
2016-04-28
clk: tegra: Fix pllre Tegra210 and add pll_re_out1
Rhyland Klein
3
-2
/
+66
2016-04-28
clk: tegra: Add sor_safe clock
Thierry Reding
2
-0
/
+5
2016-04-28
clk: tegra: dpaux and dpaux1 are fixed factor clocks
Thierry Reding
3
-2
/
+12
2016-04-28
clk: tegra: Add dpaux1 clock
Thierry Reding
3
-0
/
+3
2016-04-28
clk: tegra: Use correct parent for dpaux clock
Thierry Reding
1
-1
/
+1
2016-04-28
clk: tegra: Add fixed factor peripheral clock type
Thierry Reding
3
-0
/
+138
2016-04-28
clk: tegra: Special-case mipi-cal parent on Tegra114
Thierry Reding
2
-2
/
+6
2016-04-28
clk: tegra: Remove trailing blank line
Thierry Reding
1
-1
/
+0
2016-04-28
clk: tegra: Constify peripheral clock registers
Thierry Reding
5
-7
/
+7
2016-04-28
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
Andrew Bresticker
1
-0
/
+58
2016-04-28
treewide: Fix typos in printk
Masanari Iida
1
-1
/
+1
2016-03-30
clk: tegra: Make reset_control_ops const
Philipp Zabel
1
-1
/
+1
2016-03-03
clk: tegra: Remove CLK_IS_ROOT
Stephen Boyd
5
-14
/
+8
2016-02-02
clk: tegra: super: Fix sparse warnings for functions not declared as static
Jon Hunter
1
-3
/
+3
2016-02-02
clk: tegra: Fix sparse warnings for functions not declared as static
Jon Hunter
1
-17
/
+19
2016-02-02
clk: tegra: Fix sparse warning for pll_m
Jon Hunter
1
-1
/
+1
2016-02-02
clk: tegra: Use definition for pll_u override bit
Jon Hunter
1
-1
/
+1
2016-02-02
clk: tegra: Fix warning caused by pll_u failing to lock
Jon Hunter
1
-2
/
+0
2016-02-02
clk: tegra: Fix clock sources for Tegra210 EMC
Jon Hunter
1
-1
/
+2
2016-02-02
clk: tegra: Add the APB2APE audio clock on Tegra210
Jon Hunter
3
-0
/
+3
2016-02-02
clk: tegra: Add missing of_node_put()
Amitoj Kaur Chawla
1
-2
/
+4
2016-02-02
clk: tegra: Fix PLLE SS coefficients
Mark Kuo
1
-6
/
+12
2016-02-02
clk: tegra: Fix typos around clearing PLLE bits during enable
Rhyland Klein
1
-2
/
+2
2016-02-02
clk: tegra: Do not disable PLLE when under hardware control
Mark Kuo
1
-7
/
+15
2016-02-02
clk: tegra: Fix pllx dyn step calculation
Rhyland Klein
1
-5
/
+5
2016-02-02
clk: tegra: pll: Fix potential sleeping-while-atomic
Andrew Bresticker
1
-3
/
+3
2016-02-02
clk: tegra: Fix the misnaming of nvenc from msenc
Rhyland Klein
1
-1
/
+1
2016-02-02
clk: tegra: Fix naming of MISC registers
Rhyland Klein
1
-18
/
+18
2016-01-25
clk: tegra: Remove improper flags for lock_enable
Rhyland Klein
1
-28
/
+14
2016-01-25
clk: tegra: Fix divider on VI_I2C
Rhyland Klein
1
-1
/
+1
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