Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2016-11-11 | clk: tegra: dfll: Use builtin_platform_driver to simplify the code | Wei Yongjun | 1 | -6/+1 |
2016-11-04 | clk: tegra: make clk-tegra124-dfll-fcpu explicitly non-modular | Paul Gortmaker | 1 | -14/+2 |
2016-04-28 | clk: tegra: dfll: Reformat CVB frequency table | Thierry Reding | 1 | -25/+25 |
2016-04-28 | clk: tegra: dfll: Properly clean up on failure and removal | Thierry Reding | 1 | -4/+27 |
2016-04-28 | clk: tegra: dfll: Make code more comprehensible | Thierry Reding | 1 | -6/+5 |
2016-04-28 | clk: tegra: dfll: Reference CVB table instead of copying data | Thierry Reding | 1 | -14/+9 |
2015-07-16 | clk: tegra: Add Tegra124 DFLL clocksource platform driver | Tuomas Tynkkynen | 1 | -0/+166 |