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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
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StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
tegra
/
clk-pll.c
Age
Commit message (
Expand
)
Author
Files
Lines
2016-06-30
clk: tegra: Initialize UTMI PLL when enabling PLLU
Andrew Bresticker
1
-0
/
+505
2016-04-28
clk: tegra: Fix pllre Tegra210 and add pll_re_out1
Rhyland Klein
1
-0
/
+46
2016-02-02
clk: tegra: Fix PLLE SS coefficients
Mark Kuo
1
-6
/
+12
2016-02-02
clk: tegra: Fix typos around clearing PLLE bits during enable
Rhyland Klein
1
-2
/
+2
2016-02-02
clk: tegra: Do not disable PLLE when under hardware control
Mark Kuo
1
-7
/
+15
2016-02-02
clk: tegra: pll: Fix potential sleeping-while-atomic
Andrew Bresticker
1
-3
/
+3
2015-12-17
clk: tegra: Read correct IDDQ register in PLL_SS registration
Bill Huang
1
-4
/
+7
2015-12-17
clk: tegra: Fix WARN_ON in PLL_RE registration
Bill Huang
1
-1
/
+2
2015-12-17
clk: tegra: pll: Fix issues with rates for VCO PLLs
Andrew Bresticker
1
-4
/
+12
2015-12-17
clk: tegra: Add support for Tegra210 clocks
Rhyland Klein
1
-0
/
+5
2015-12-17
clk: tegra: pll: Add logic for SS
Bill Huang
1
-1
/
+24
2015-12-17
clk: tegra: pll: Add dyn_ramp callback
Rhyland Klein
1
-0
/
+7
2015-12-17
clk: tegra: pll: Add Set_default logic
Bill Huang
1
-11
/
+28
2015-12-17
clk: tegra: pll: Adjust vco_min if SDM present
Bill Huang
1
-0
/
+28
2015-12-17
clk: tegra: pll: Add support for PLLMB for Tegra210
Rhyland Klein
1
-5
/
+43
2015-12-17
clk: tegra: pll: Add specialized logic for Tegra210
Rhyland Klein
1
-2
/
+322
2015-11-20
clk: tegra: pll: Update PLLM handling
Danny Huang
1
-49
/
+7
2015-11-20
clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate
Rhyland Klein
1
-41
/
+50
2015-11-20
clk: tegra: pll: Add code to handle if resets are supported by PLL
Bill Huang
1
-0
/
+12
2015-11-20
clk: tegra: pll: Add logic for out-of-table rates for T210
Rhyland Klein
1
-2
/
+22
2015-11-20
clk: tegra: pll: Add logic for handling SDM data
Rhyland Klein
1
-1
/
+65
2015-11-20
clk: tegra: pll: Don't unconditionally set LOCK flags
Rhyland Klein
1
-9
/
+2
2015-11-20
clk: tegra: pll: Update warning message
Rhyland Klein
1
-1
/
+2
2015-11-20
clk: tegra: pll: Simplify clk_enable_path
Rhyland Klein
1
-54
/
+22
2015-11-20
clk: tegra: pll: Add tegra_pll_wait_for_lock to clk header
Rhyland Klein
1
-0
/
+5
2015-11-20
clk: tegra: Constify pdiv-to-hw mappings
Thierry Reding
1
-3
/
+3
2015-11-18
clk: tegra: Miscellaneous coding style cleanups
Thierry Reding
1
-3
/
+3
2015-08-25
clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)
Stephen Boyd
1
-4
/
+4
2015-08-25
clk: tegra: Convert to clk_hw based provider APIs
Stephen Boyd
1
-5
/
+5
2015-07-20
clk: tegra: Properly include clk.h
Stephen Boyd
1
-1
/
+1
2015-04-10
clk: tegra: Remove needless initializations
Thierry Reding
1
-3
/
+3
2015-04-10
clk: tegra: Various whitespace cleanups
Thierry Reding
1
-0
/
+1
2015-02-02
clk: tegra: Add support for the Tegra132 CAR IP block
Paul Walmsley
1
-3
/
+7
2015-02-02
clk: tegra: Fix order of arguments in WARN
Tomeu Vizoso
1
-4
/
+4
2014-07-08
clk: tegra: Use XUSB-compatible SATA PLL sequence
Mikko Perttunen
1
-0
/
+11
2014-06-25
clk: tegra: Enable hardware control of SATA PLL
Mikko Perttunen
1
-0
/
+8
2014-05-28
Merge branch 'clk-fixes' into clk-next
Mike Turquette
1
-21
/
+43
2014-05-28
Merge tag 'clk-tegra-fixes-3.15' of git://nv-tegra.nvidia.com/user/pdeschrijv...
Mike Turquette
1
-21
/
+43
2014-05-23
clk: tegra: Enable hardware control of PLLE
Jim Lin
1
-1
/
+32
2014-05-17
clk: tegra: Fix wrong value written to PLLE_AUX
Tuomas Tynkkynen
1
-1
/
+1
2014-04-17
clk: tegra: Fix enabling of PLLE
Thierry Reding
1
-1
/
+1
2014-04-17
clk: tegra: Introduce divider mask and shift helpers
Thierry Reding
1
-20
/
+24
2014-04-17
clk: tegra: Fix PLLE programming
Thierry Reding
1
-6
/
+24
2013-12-20
clk: tegra: Staticize local variables in clk-pll.c
Sachin Kamat
1
-6
/
+6
2013-11-28
clk: tegra: fix __clk_lookup() return value checks
Wei Yongjun
1
-4
/
+4
2013-11-28
clk: tegra: Do not print errors for clk_round_rate()
Thierry Reding
1
-6
/
+3
2013-11-26
clk: tegra: Add support for PLLSS
Peter De Schrijver
1
-2
/
+121
2013-11-26
clk: tegra: move fields to tegra_clk_pll_params
Peter De Schrijver
1
-79
/
+59
2013-11-26
clk: tegra: use pll_ref as the pll_e parent
Peter De Schrijver
1
-3
/
+5
2013-11-26
clk: tegra: move some PLLC and PLLXC init to clk-pll.c
Peter De Schrijver
1
-4
/
+91
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