summaryrefslogtreecommitdiff
path: root/drivers/clk/sunxi
AgeCommit message (Expand)AuthorFilesLines
2014-12-04clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso2-4/+4
2014-11-23clk: sunxi: gmac-tx-clk mux is not a CLK_MUX_INDEX_BIT muxHans de Goede1-1/+6
2014-11-23clk: sunxi: Implement A31 PLL6 as a divs clock for 2x outputChen-Yu Tsai1-12/+16
2014-11-23clk: sunxi: Specify number of child clocks for divs clocksChen-Yu Tsai1-2/+9
2014-11-23clk: sunxi: Removed unused/incorrect sun6i-a31-apb2-clk driverChen-Yu Tsai1-7/+0
2014-11-11clk: sunxi: unify APB1 clockEmilio López1-5/+2
2014-10-21clk: sunxi: Add support for bus clock gates on Allwinner A80 SoCChen-Yu Tsai1-0/+31
2014-10-21clk: sunxi: Add support for A80 basic bus clocksChen-Yu Tsai2-0/+272
2014-10-21clk: sunxi: make factors clock mux mask configurableChen-Yu Tsai5-3/+5
2014-09-27Merge tag 'sunxi-clocks-for-3.18' of git://git.kernel.org/pub/scm/linux/kerne...Mike Turquette6-156/+485
2014-09-27clk: sunxi: Add sun8i MBUS clock supportChen-Yu Tsai2-0/+79
2014-09-27clk: sunxi: mod0: Introduce MMC proper phase handlingMaxime Ripard1-0/+189
2014-09-27clk: sunxi: Move mbus to mod0 fileMaxime Ripard2-57/+12
2014-09-27clk: sunxi: Move mod0 clock to a file of its ownMaxime Ripard3-1/+83
2014-09-27clk: sunxi: Introduce mbus compatibleMaxime Ripard1-0/+1
2014-09-27clk: sunxi: factors: Invert the probing logicMaxime Ripard3-99/+113
2014-09-26clk: Remove .owner field for driverKiran Padwal4-4/+0
2014-09-13clk: sunxi: add correct divider table for sun4i-apb0 clockChen-Yu Tsai1-0/+9
2014-07-29clk: sunxi: staticize structures and arraysEmilio López4-5/+5
2014-07-29clk: sunxi: add __iomem markings to MMIO pointersEmilio López2-6/+6
2014-07-26Merge tag 'sunxi-clocks-for-3.17' of git://git.kernel.org/pub/scm/linux/kerne...Mike Turquette6-43/+227
2014-07-15clk: sunxi: sun6i-a31-apb0-gates: Add A23 APB0 supportChen-Yu Tsai1-0/+5
2014-07-15clk: sunxi: sun6i-apb0-gates: use bitmaps for valid gate indicesChen-Yu Tsai1-36/+39
2014-07-07clk: sunxi: Fix gate indexing for sun6i-a31-apb0-gatesChen-Yu Tsai1-1/+5
2014-07-07clk: sunxi: Add A23 APB0 divider clock supportChen-Yu Tsai2-1/+71
2014-07-04clk: sunxi: Add A23 clocks supportChen-Yu Tsai1-0/+101
2014-07-04clk: sunxi: Add support for table-based divider clocksChen-Yu Tsai1-4/+5
2014-07-04clk: sunxi: Support factor clocks with N factor starting not from 0Chen-Yu Tsai2-1/+2
2014-07-04clk: sunxi: move "ahb_sdram" to protected clock listChen-Yu Tsai1-5/+3
2014-07-04clk: sunxi: register clock gates with clkdevChen-Yu Tsai1-0/+1
2014-07-02clk: sunxi: fix devm_ioremap_resource error detection codeHimangi Saraogi1-1/+1
2014-06-11clk: sunxi: add PRCM (Power/Reset/Clock Management) clks supportBoris BREZILLON4-0/+411
2014-06-11clk: sun6i: Protect SDRAM gating bitMaxime Ripard1-0/+1
2014-06-11clk: sun6i: Protect CPU clockMaxime Ripard1-0/+1
2014-06-11clk: sunxi: Rework clock protection codeMaxime Ripard1-28/+44
2014-06-11clk: sunxi: Move the GMAC clock to a file of its ownMaxime Ripard3-99/+121
2014-06-11clk: sunxi: Move the 24M oscillator to a file of its ownMaxime Ripard3-57/+74
2014-06-11clk: sunxi: Remove calls to clk_putMaxime Ripard1-6/+2
2014-06-11clk: sunxi: Implement A31 USB clockMaxime Ripard1-0/+6
2014-06-08Merge tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds2-0/+73
2014-05-20clk: sunxi: fix function type for CLK_OF_DECLARERob Herring1-1/+1
2014-05-20clk: sunxi: avoid double DT matchingRob Herring1-2/+1
2014-05-15clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clkHans de Goede1-1/+2
2014-05-06clk: sunxi: Implement MMC phase controlEmilio López1-0/+36
2014-05-06clk: sunxi: factors: automatic reparenting supportEmilio López1-0/+36
2014-03-19clk: sunxi: fix thinko in commentEmilio López1-1/+1
2014-03-19clk: sunxi: fix some calculationsEmilio López1-3/+3
2014-03-19clk: sunxi: fix A20 PLL4 calculationEmilio López1-0/+7
2014-02-18clk: sunxi: Add new clock compatiblesMaxime Ripard1-15/+15
2014-02-18clk: sunxi: Add Allwinner A20/A31 GMAC clock unitChen-Yu Tsai1-0/+96