Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2022-05-06 | clk: sunxi-ng: h616: Add PLL derived 32KHz clock | Andre Przywara | 1 | -0/+8 |
2021-11-23 | clk: sunxi-ng: Convert early providers to platform drivers | Samuel Holland | 1 | -10/+23 |
2021-09-13 | clk: sunxi-ng: Unregister clocks/resets when unbinding | Samuel Holland | 1 | -3/+1 |
2021-01-28 | clk: sunxi-ng: Add support for the Allwinner H616 CCU | Andre Przywara | 1 | -0/+1150 |