starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2021-01-20	clk: sunxi-ng: h6: Fix clock divider range on some clocks	Andre Przywara	1	-4/+4
2021-01-06	clk: sunxi-ng: h6: Fix CEC clock	Andre Przywara	1	-1/+1
2019-10-02	clk: sunxi-ng: h6: Allow GPU to change parent rate	Jernej Skrabec	1	-1/+1
2019-09-30	clk: sunxi-ng: h6: Use sigma-delta modulation for audio PLL	Jernej Skrabec	1	-6/+15
2019-08-21	clk: sunxi-ng: h6: Allow I2S to change parent rate	Jernej Skrabec	1	-4/+4
2019-06-22	clk: sunxi-ng: h6: Use local parent references for CLK_FIXED_FACTOR	Chen-Yu Tsai	1	-25/+44
2019-05-15	clk: Remove io.h from clk-provider.h	Stephen Boyd	1	-0/+1
2019-04-04	clk: sunxi-ng: h6: Allow video & vpu clocks to change parent rate	Jernej Skrabec	1	-3/+3
2019-04-03	clk: sunxi-ng: h6: Preset hdmi-cec clock parent	Jernej Skrabec	1	-0/+11
2019-03-18	clk: sunxi-ng: Allow DE clock to set parent rate	Jernej Skrabec	1	-1/+1
2018-11-05	clk: sunxi-ng: h6: Set video PLLs limits	Jernej Skrabec	1	-0/+4
2018-11-05	clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width	Jagan Teki	1	-3/+3
2018-09-05	clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks	Icenowy Zheng	1	-20/+23
2018-08-27	clk: sunxi-ng: h6: fix PWM gate/reset offset	Rongyi Chen	1	-1/+1
2018-08-27	clk: sunxi-ng: h6: fix bus clocks' divider position	Icenowy Zheng	1	-4/+4
2018-03-21	clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU	Icenowy Zheng	1	-0/+4
2018-03-18	clk: sunxi-ng: add support for the Allwinner H6 CCU	Icenowy Zheng	1	-0/+1207