index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
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tree
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author
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path:
root
/
drivers
/
clk
/
st
Age
Commit message (
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)
Author
Files
Lines
2021-06-28
clk: st: clkgen-fsyn: embed soc clock outputs within compatible data
Alain Volmat
1
-12
/
+101
2021-06-28
clk: st: clkgen-pll: embed soc clock outputs within compatible data
Alain Volmat
1
-14
/
+106
2021-06-28
clk: st: flexgen: embed soc clock outputs within compatible data
Alain Volmat
1
-14
/
+353
2021-06-28
clk: st: clkgen-pll: remove unused variable of struct clkgen_pll
Alain Volmat
1
-1
/
+0
2021-02-11
clk: st: clkgen-fsyn: Fix worthy struct documentation demote partially filled...
Lee Jones
1
-3
/
+3
2021-02-11
clk: st: clkgen-pll: Demote unpopulated kernel-doc header
Lee Jones
1
-2
/
+1
2020-07-16
clk: st: Remove uninitialized_var() usage
Kees Cook
1
-1
/
+0
2020-05-27
clk: clk-flexgen: fix clock-critical handling
Alain Volmat
1
-0
/
+1
2019-09-20
Merge branches 'clk-aspeed', 'clk-unused', 'clk-of-node-put', 'clk-const-bulk...
Stephen Boyd
3
-14
/
+1
2019-09-06
clk: st: clkgen-pll: remove unused variable 'st_pll3200c32_407_a0'
YueHaibing
1
-13
/
+0
2019-09-06
clk: st: clkgen-fsyn: remove unused variable 'st_quadfs_fs660c32_ops'
YueHaibing
1
-1
/
+0
2019-08-08
clk: st: clk-flexgen: Add of_node_put() in st_of_flexgen_setup()
Nishka Dasgupta
1
-0
/
+1
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
1
-5
/
+1
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194
Thomas Gleixner
1
-1
/
+2
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Thomas Gleixner
2
-12
/
+2
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
1
-0
/
+1
2019-05-15
clk: Remove io.h from clk-provider.h
Stephen Boyd
1
-0
/
+1
2018-12-11
clk: st: Remove usage of CLK_IS_BASIC
Stephen Boyd
3
-4
/
+4
2018-08-30
clk: Convert to using %pOFn instead of device_node.name
Rob Herring
1
-1
/
+1
2018-06-13
treewide: kzalloc() -> kcalloc()
Kees Cook
2
-2
/
+2
2017-11-02
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Greg Kroah-Hartman
1
-0
/
+1
2016-12-09
clk: st: clk-flexgen: Unmap region obtained by of_iomap
Arvind Yadav
1
-1
/
+4
2016-09-17
drivers: clk: st: Handle clk synchronous mode for video clocks
Gabriel Fernandez
1
-2
/
+35
2016-09-17
drivers: clk: st: Add clock propagation for audio clocks
Gabriel Fernandez
1
-1
/
+25
2016-09-17
drivers: clk: st: Add fs660c32 synthesizer algorithm
Gabriel Fernandez
1
-69
/
+111
2016-09-17
drivers: clk: st: Simplify clock binding of STiH4xx platforms
Gabriel Fernandez
3
-77
/
+55
2016-09-17
drivers: clk: st: Remove stih415-416 clock support
Gabriel Fernandez
3
-1404
/
+1
2016-06-30
clk: st: clkgen-pll: Detect critical clocks
Lee Jones
1
-10
/
+17
2016-06-30
clk: st: clkgen-fsyn: Detect critical clocks
Lee Jones
1
-3
/
+7
2016-06-30
clk: st: clk-flexgen: Detect critical clocks
Lee Jones
1
-1
/
+3
2016-02-27
clk: st: Remove impossible check for of_clk_get_parent_count() < 0
Stephen Boyd
2
-4
/
+4
2016-01-30
clk: st: avoid uninitialized variable use
Arnd Bergmann
1
-2
/
+6
2016-01-29
clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h
Geliang Tang
1
-5
/
+4
2015-11-20
clk: st: avoid uninitialized variable use
Arnd Bergmann
1
-8
/
+9
2015-10-09
drivers: clk: st: Correct the pll-type for A9 for stih418
Gabriel Fernandez
1
-0
/
+194
2015-10-09
drivers: clk: st: PLL rate change implementation for DVFS
Gabriel Fernandez
3
-10
/
+216
2015-10-09
drivers: clk: st: Support for enable/disable in Clockgen PLLs
Gabriel Fernandez
1
-1
/
+59
2015-10-02
clk: st: fix handling result of of_property_count_strings
Andrzej Hajda
1
-3
/
+4
2015-09-17
drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x
Gabriel Fernandez
2
-10
/
+10
2015-08-25
clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)
Stephen Boyd
4
-16
/
+16
2015-08-25
clk: Convert __clk_get_flags() to clk_hw_get_flags()
Stephen Boyd
1
-1
/
+1
2015-07-28
Merge branch 'cleanup-clk-h-includes' into clk-next
Stephen Boyd
4
-0
/
+4
2015-07-28
clk: st: make use of of_clk_parent_fill helper function
Dinh Nguyen
2
-9
/
+4
2015-07-20
clk: st: Include clk.h
Stephen Boyd
4
-0
/
+4
2015-07-14
clk: st: Fix error paths and allocation style
Stephen Boyd
1
-38
/
+45
2015-07-08
drivers: clk: st: Incorrect register offset used for lock_status
Pankaj Dev
1
-1
/
+1
2015-07-06
drivers: clk: st: Fix mux bit-setting for Cortex A9 clocks
Gabriel Fernandez
1
-1
/
+1
2015-07-06
drivers: clk: st: Add CLK_GET_RATE_NOCACHE flag to clocks
Pankaj Dev
4
-6
/
+8
2015-07-06
drivers: clk: st: Fix flexgen lock init
Giuseppe Cavallaro
1
-0
/
+2
2015-07-06
drivers: clk: st: Fix FSYN channel values
Gabriel Fernandez
1
-2
/
+2
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