index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
sprd
Age
Commit message (
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)
Author
Files
Lines
2019-07-17
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
2
-3
/
+11
2019-06-28
clk: sprd: Add check for return value of sprd_clk_regmap_init()
Chunyan Zhang
1
-1
/
+4
2019-06-26
clk: sprd: Check error only for devm_regmap_init_mmio()
Chunyan Zhang
1
-1
/
+1
2019-06-26
clk: sprd: Switch from of_iomap() to devm_ioremap_resource()
Chunyan Zhang
1
-1
/
+6
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
2
-0
/
+2
2019-05-01
clk: sprd: Use the correct style for SPDX License Identifier
Nishad Kamdar
6
-6
/
+6
2018-03-17
clk: sprd: add RTC gate for SC9860
Chunyan Zhang
1
-0
/
+76
2018-01-27
Merge branch 'clk-divider-container' into clk-next
Stephen Boyd
1
-1
/
+2
2017-12-22
clk: sprd: add clocks support for SC9860
Chunyan Zhang
3
-0
/
+1987
2017-12-22
clk: sprd: add adjustable pll support
Chunyan Zhang
3
-0
/
+375
2017-12-22
clk: sprd: add composite clock support
Chunyan Zhang
3
-0
/
+112
2017-12-22
clk: sprd: add divider clock support
Chunyan Zhang
3
-0
/
+166
2017-12-22
clk: sprd: add mux clock support
Chunyan Zhang
3
-0
/
+151
2017-12-22
clk: sprd: add gate clock support
Chunyan Zhang
3
-0
/
+171
2017-12-22
clk: sprd: Add common infrastructure
Chunyan Zhang
4
-0
/
+141