Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2020-12-16 | clk: sifive: Add clock enable and disable ops | Pragnesh Patel | 1 | -0/+10 |
2020-12-16 | clk: sifive: Fix the wrong bit field shift | Zong Li | 1 | -2/+2 |
2020-12-16 | clk: sifive: Add a driver for the SiFive FU740 PRCI IP block | Zong Li | 1 | -0/+88 |
2020-12-16 | clk: sifive: Extract prci core to common base | Zong Li | 1 | -0/+201 |