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path: root/drivers/clk/samsung/clk-exynos5433.c
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2016-02-25clk: samsung: exynos5433: Fix wrong registers of PCLK_GSCL_SMMU clocksJonghwa Lee1-2/+2
2016-02-25clk: samsung: exynos5433: Fix mout_aclk_cam1*_user clocks definitionSylwester Nawrocki1-2/+2
2016-02-25clk: samsung: exynos5433: Drop RO registers from the save/restore listsSylwester Nawrocki1-100/+0
2016-02-25clk: samsung: exynos5433: Fix definitions of SCLK ISP SENSOR0 clocksMarek Szyprowski1-2/+2
2016-02-25clk: samsung: exynos5433: Fix definitions of MUX_SEL_CAM04 clocksSylwester Nawrocki1-6/+6
2016-02-23clk: samsung: exynos5433: Fix typos in *_ISP_MPWM clock namesSylwester Nawrocki1-3/+3
2016-02-03clk/samsung: exynos5433: add pclk_decon clockAndrzej Hajda1-0/+2
2016-02-03clk/samsung: exynos5433: add definitions of HDMI-PHY output clocksAndrzej Hajda1-2/+4
2015-07-20clk: samsung: Properly include clk.h and clkdev.hStephen Boyd1-2/+0
2015-06-10clk: exynos5433: Add CLK_IGNORE_UNUSED flag to clocks for SMCJonghwa Lee1-18/+18
2015-06-10clk: exynos5433: Add clock flag to support the DVFS of GPUJoonyoung Shim1-9/+9
2015-06-10clk: exynos5433: Add DIV_CPIF to the list of stored registers on suspendHyungwon Hwang1-0/+1
2015-06-10clk: exynos5433: Add CLK_SET_RATE_PARENT to support DVFS for big.LITTLE coreChanwoo Choi1-14/+12
2015-04-29clk: exynos5433: Fix wrong PMS value of exynos5433_pll_ratesChanwoo Choi1-3/+3
2015-04-29clk: exynos5433: Fix wrong parent clock of sclk_apollo clockChanwoo Choi1-1/+1
2015-04-29clk: exynos5433: Fix CLK_PCLK_MONOTONIC_CNT clk register assignmentJonghwa Lee1-1/+1
2015-04-29clk: exynos5433: Fix wrong offset of PCLK_MSCL_SECURE_SMMU_JPEGJonghwa Lee1-1/+1
2015-02-05clk: samsung: exynos5433: Move CLK_SCLK_HDMI_SPDIF_DISP clock to CMU_TOP domainChanwoo Choi1-5/+5
2015-02-05clk: samsung: exynos5433: Add clocks for CMU_CAM1 domainChanwoo Choi1-0/+435
2015-02-05clk: samsung: exynos5433: Add clocks for CMU_CAM0 domainChanwoo Choi1-0/+501
2015-02-05clk: samsung: exynos5433: Add clocks for CMU_ISP domainChanwoo Choi1-0/+267
2015-02-05clk: samsung: exynos5433: Add clocks for CMU_HEVC domainChanwoo Choi1-0/+115
2015-02-05clk: samsung: exynos5433: Add clocks for CMU_MFC domainChanwoo Choi1-0/+113
2015-02-05clk: samsung: exynos5433: Add clocks for CMU_MSCL domainChanwoo Choi1-0/+185
2015-02-05clk: samsung: exynos5433: Add clocks for CMU_ATLAS domainChanwoo Choi1-0/+219
2015-02-05clk: samsung: exynos5433: Add clocks for CMU_APOLLO domainChanwoo Choi1-0/+193
2015-02-04clk: samsung: exynos5433: Add clocks for CMU_GSCL domainChanwoo Choi1-0/+146
2015-02-04clk: samsung: exynos5433: Add clocks for CMU_G3D domainChanwoo Choi1-0/+127
2015-02-04clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domainChanwoo Choi1-0/+302
2015-02-04clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domainsChanwoo Choi1-0/+187
2015-02-04clk: samsung: exynos5433: Add clocks for CMU_AUD domainChanwoo Choi1-0/+172
2015-02-04clk: samsung: exynos5433: Add clocks for CMU_DISP domainChanwoo Choi1-0/+437
2015-02-04clk: samsung: exynos5433: Add clocks for CMU_MIF domainChanwoo Choi1-0/+599
2015-02-04clk: samsung: exynos5433: Add clocks for CMU_G2D domainChanwoo Choi1-0/+146
2015-02-04clk: samsung: exynos5433: Add clocks for CMU_PERIS domainChanwoo Choi1-2/+149
2015-02-04clk: samsung: exynos5433: Add clocks for CMU_PERIC domainChanwoo Choi1-2/+81
2015-02-04clk: samsung: exynos5433: Add MUX clocks of CMU_TOP domainChanwoo Choi1-0/+90
2015-02-04clk: samsung: exynos5433: Add clocks using common clock frameworkChanwoo Choi1-0/+963
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