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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
rockchip
Age
Commit message (
Expand
)
Author
Files
Lines
2016-02-15
Merge tag 'v4.6-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...
Michael Turquette
7
-153
/
+157
2016-02-04
clk: rockchip: convert manually created factor clocks to the new type
Heiko Stuebner
5
-98
/
+24
2016-02-04
clk: rockchip: add a factor clock type
Heiko Stuebner
2
-0
/
+83
2016-02-04
clk: rockchip: fix parent of hclk_vcodec on rk3036
Heiko Stuebner
1
-1
/
+1
2016-02-03
clk: rockchip: free memory in error cases when registering clock branches
Shawn Lin
1
-2
/
+7
2016-01-30
Merge branch 'clk-fixes' into clk-next
Stephen Boyd
2
-26
/
+26
2016-01-29
clk-divider: make sure read-only dividers do not write to their register
Heiko Stuebner
1
-1
/
+3
2016-01-29
clk: rockchip: Allow sclk_i2s0 and i2s0_frac to change their parents rate on ...
Alexander Kochetkov
1
-2
/
+2
2016-01-28
clk: rockchip: fix wrong mmc phase shift for rk3228
Shawn Lin
1
-3
/
+3
2016-01-26
clk: rockchip: add hclk_cpubus to the list of rk3188 critical clocks
Alexander Kochetkov
1
-0
/
+1
2016-01-26
clk: rockchip: add tsadc clock on rk3066
Paweł Jarosz
1
-1
/
+1
2016-01-25
clk: rockchip: fix usbphy-related clocks
Heiko Stuebner
2
-19
/
+8
2016-01-25
clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for i2s_2ch
zhangqing
1
-1
/
+1
2016-01-25
clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for spdif_8ch
zhangqing
1
-1
/
+1
2016-01-25
clk: rockchip: rk3368: fix edp_24m parent
zhangqing
1
-1
/
+1
2016-01-25
clk: rockchip: rk3368: fix hdmi_cec gate-register
Heiko Stuebner
1
-1
/
+1
2016-01-25
clk: rockchip: rk3368: fix parents of video encoder/decoder
Heiko Stuebner
1
-2
/
+2
2016-01-25
clk: rockchip: rk3368: fix cpuclk core dividers
Heiko Stuebner
1
-20
/
+20
2016-01-25
clk: rockchip: rk3368: fix cpuclk mux bit of big cpu-cluster
Heiko Stuebner
1
-1
/
+1
2016-01-25
clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for hclk_vio_bus
Yakir Yang
1
-1
/
+1
2016-01-16
clk: rockchip: rk3368: fix some clock gates
Jianqun xu
1
-13
/
+13
2016-01-16
clk: rockchip: rk3036: rename emac ext source clock
Xing Zheng
1
-1
/
+1
2016-01-16
clk: rockchip: rk3036: fix the div offset for emac clock
Xing Zheng
1
-2
/
+2
2016-01-16
clk: rockchip: rk3036: fix uarts clock error
Xing Zheng
1
-4
/
+4
2016-01-16
clk: rockchip: rk3036: fix the FLAGs for clock mux
Xing Zheng
1
-6
/
+6
2016-01-03
Merge branch 'clk-rockchip' into clk-next
Michael Turquette
4
-47
/
+116
2016-01-03
clk: rockchip: fix section mismatches with new child-clocks
Heiko Stübner
4
-47
/
+116
2015-12-24
Merge branch 'clk-rockchip' into clk-next
Michael Turquette
5
-105
/
+235
2015-12-23
clk: rockchip: rk3036: include downstream muxes into fractional dividers
Xing Zheng
1
-17
/
+17
2015-12-23
clk: rockchip: Allow the RK3288 SPDIF clocks to change their parent
Sjoerd Simons
1
-8
/
+8
2015-12-23
clk: rockchip: include downstream muxes into fractional dividers
Heiko Stuebner
2
-72
/
+74
2015-12-23
clk: rockchip: handle mux dependency of fractional dividers
Heiko Stuebner
2
-14
/
+142
2015-12-21
clk: rockchip: only enter pll slow-mode directly before reboots on rk3288
Heiko Stuebner
7
-8
/
+13
2015-12-17
clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for aclk_vio
Yakir Yang
1
-1
/
+1
2015-12-12
clk: rockchip: use rk3288-efuse clock ids
ZhengShunQian
1
-2
/
+2
2015-12-12
clk: rockchip: add clock controller for rk3228
Jeffy Chen
3
-1
/
+689
2015-12-10
clk: rockchip: allow more than 2 parents for cpuclk
Jeffy Chen
1
-2
/
+2
2015-12-03
clk: rockchip: fix rk3368 cpuclk divider offsets
Heiko Stuebner
1
-2
/
+2
2015-12-03
clk: rockchip: protect rk3368 aclk_bus and aclk_peri clocks
Jianqun xu
1
-0
/
+2
2015-12-02
clk: rockchip: Force rk3368 PWM clock (and its parents) on
Caesar Wang
1
-0
/
+5
2015-12-01
clk: rockchip: switch PLLs to slow mode before reboot for rk3288
Chris Zhong
1
-18
/
+14
2015-11-26
clk: rockchip: add mipidsi clock on rk3288
Chris Zhong
1
-1
/
+1
2015-11-23
clk: rockchip: add clock controller for rk3036
Xing Zheng
3
-1
/
+487
2015-11-23
clk: rockchip: add new pll-type for rk3036 and similar socs
Xing Zheng
2
-1
/
+280
2015-11-23
clk: rockchip: set the id for crypto clk
Zain Wang
1
-1
/
+1
2015-11-05
Merge tag 'clk-for-linus-20151104' of git://git.kernel.org/pub/scm/linux/kern...
Linus Torvalds
3
-63
/
+89
2015-10-26
clk: rockchip: Make calculations use rounding
Douglas Anderson
1
-6
/
+7
2015-10-26
clk: rockchip: Allow more precision for some mmc clock phases
Douglas Anderson
1
-15
/
+30
2015-10-02
clk: rockchip: save width in struct clk_fractional_divider
Andy Shevchenko
1
-2
/
+4
2015-10-02
clk: rockchip: reset init state before mmc card initialization
Shawn Lin
1
-0
/
+11
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