index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
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path:
root
/
drivers
/
clk
/
rockchip
Age
Commit message (
Expand
)
Author
Files
Lines
2019-12-24
clk: let init callback return an error code
Jerome Brunet
1
-11
/
+17
2019-11-05
clk: rockchip: protect the pclk_usb_grf as critical on px30
Heiko Stuebner
1
-1
/
+2
2019-11-05
clk: rockchip: add video-related niu clocks as critical on px30
Heiko Stuebner
1
-5
/
+10
2019-11-05
clk: rockchip: move px30 critical clocks to correct clock controller
Heiko Stuebner
1
-4
/
+4
2019-11-05
clk: rockchip: Add div50 clocks for px30 sdmmc, emmc, sdio and nandc
Finley Xiao
1
-4
/
+40
2019-10-31
clk: rockchip: make clk_half_divider_ops static
Ben Dooks (Codethink)
1
-2
/
+1
2019-09-05
clk: rockchip: Add clock controller for the rk3308
Finley Xiao
3
-0
/
+969
2019-07-25
clk: rockchip: Fix -Wunused-const-variable in rv1108 clk driver
Nathan Huckleberry
1
-1
/
+0
2019-07-17
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
8
-46
/
+27
2019-06-27
clk: rockchip: export HDMIPHY clock on rk3228
Heiko Stuebner
1
-1
/
+1
2019-06-27
clk: rockchip: add watchdog pclk on rk3328
Heiko Stuebner
1
-0
/
+3
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
1
-4
/
+1
2019-06-15
clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macro
Heiko Stuebner
4
-36
/
+12
2019-06-14
clk: rockchip: add a type from SGRF-controlled gate clocks
Heiko Stuebner
1
-0
/
+4
2019-06-06
clk: rockchip: Remove 48 MHz PLL rate from rk3288
Douglas Anderson
1
-1
/
+0
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
Thomas Gleixner
1
-11
/
+1
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Thomas Gleixner
17
-170
/
+17
2019-05-20
clk: rockchip: add 1.464GHz cpu-clock rate to rk3228
Justin Swartz
1
-0
/
+1
2019-05-20
clk: rockchip: Slightly more accurate math in rockchip_mmc_get_phase()
Douglas Anderson
1
-3
/
+3
2019-05-20
clk: rockchip: Don't yell about bad mmc phases when getting
Douglas Anderson
1
-3
/
+1
2019-05-20
clk: rockchip: Use clk_hw_get_rate() in MMC phase calculation
Douglas Anderson
1
-2
/
+2
2019-05-15
clk: Remove io.h from clk-provider.h
Stephen Boyd
12
-1
/
+13
2019-05-07
Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' a...
Stephen Boyd
4
-26
/
+60
2019-04-23
clk: core: replace clk_{readl,writel} with {readl,writel}
Jonas Gorski
2
-4
/
+4
2019-04-23
clk: rockchip: undo several noc and special clocks as critical on rk3288
Douglas Anderson
1
-9
/
+4
2019-04-12
clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type
Finley Xiao
2
-3
/
+29
2019-04-12
clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288
Douglas Anderson
1
-0
/
+11
2019-04-12
clk: rockchip: Limit use of USB PHY clock to USB on rk3288
Matthias Kaehlcke
1
-2
/
+2
2019-04-12
clk: rockchip: Fix video codec clocks on rk3288
Douglas Anderson
1
-2
/
+2
2019-04-11
clk: rockchip: Make rkpwm a critical clock on rk3288
Douglas Anderson
1
-1
/
+3
2019-03-18
clk: rockchip: fix wrong clock definitions for rk3328
Jonas Karlman
1
-9
/
+9
2019-01-07
clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclks
Finley Xiao
1
-2
/
+2
2019-01-07
clk: rockchip: fix frac settings of GPLL clock for rk3328
Katsuhiro Suzuki
1
-6
/
+6
2018-11-26
clk: rockchip: add clock-id to gate of ACODEC for rk3328
Katsuhiro Suzuki
1
-1
/
+1
2018-11-19
clk: rockchip: fix I2S1 clock gate register for rk3328
Katsuhiro Suzuki
1
-1
/
+1
2018-11-15
clk: rockchip: make rk3188 hclk_vio_bus critical
Mark Yao
1
-1
/
+2
2018-11-15
clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering
Heiko Stuebner
1
-2
/
+2
2018-11-15
clk: rockchip: fix rk3188 sclk_smc gate data
Finley Xiao
1
-2
/
+2
2018-11-12
clk: rockchip: fix typo in rk3188 spdif_frac parent
Johan Jonker
1
-1
/
+1
2018-10-17
clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent call
Enric Balletbo i Serra
1
-4
/
+0
2018-10-11
clk: rockchip: use the newly added clock-id for hdmi on RK3066
Heiko Stuebner
1
-1
/
+1
2018-10-11
clk: rockchip: fix wrong mmc sample phase shift for rk3328
Ziyuan Xu
1
-4
/
+4
2018-08-31
clk: rockchip: improve rk3288 pll rates for better hdmi output
Urja Rannikko
1
-4
/
+25
2018-08-07
clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399
Levin Du
1
-0
/
+1
2018-07-08
clk: rockchip: fix clk_i2sout parent selection bits on rk3399
Alberto Panizzo
1
-1
/
+1
2018-07-06
clk: rockchip: add clock controller for px30
Elaine Zhang
3
-1
/
+1080
2018-07-06
clk: rockchip: add support for half divider
Elaine Zhang
4
-0
/
+323
2018-05-23
clk: rockchip: remove deprecated gate-clk code and dt-binding
Heiko Stuebner
2
-99
/
+0
2018-05-22
clk: rockchip: use match_string() helper
Yisheng Xie
1
-11
/
+5
2018-03-23
clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399
Lin Huang
1
-2
/
+2
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