index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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commit
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path:
root
/
drivers
/
clk
/
rockchip
/
clk.h
Age
Commit message (
Expand
)
Author
Files
Lines
2015-07-28
Merge branch 'cleanup-clk-h-includes' into clk-next
Stephen Boyd
1
-2
/
+2
2015-07-20
clk: rockchip: Properly include clk.h
Stephen Boyd
1
-2
/
+2
2015-07-07
clk: rockchip: add rk3368 clock controller
Heiko Stuebner
1
-0
/
+16
2015-07-07
clk: rockchip: add support for phase inverters
Heiko Stuebner
1
-0
/
+20
2015-07-07
clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variant
Heiko Stuebner
1
-0
/
+20
2015-07-07
clk: rockchip: protect register macros against multipart values
Heiko Stuebner
1
-8
/
+8
2015-06-05
clk: make several parent names const
Uwe Kleine-König
1
-10
/
+10
2015-04-13
clk: don't use __initconst for non-const arrays
Uwe Kleine-König
1
-2
/
+2
2014-11-28
clk: rockchip: Add support for the mmc clock phases using the framework
Alexandru M Stan
1
-0
/
+23
2014-11-25
clk: rockchip: add optional sync to pll rate parameters
Heiko Stuebner
1
-0
/
+6
2014-11-25
clk: rockchip: add ability to specify pll-specific flags
Heiko Stuebner
1
-2
/
+5
2014-10-29
clk: rockchip: change PLL setting for better clock jitter
Kever Yang
1
-0
/
+9
2014-10-01
clk: rockchip: add restart handler
Heiko Stübner
1
-0
/
+1
2014-09-27
clk: rockchip: add new clock-type for the cpuclk
Heiko Stuebner
1
-0
/
+37
2014-09-03
clk: rockchip: protect critical clocks from getting disabled
Heiko Stübner
1
-0
/
+1
2014-07-13
clk: rockchip: add clock controller for rk3288
Heiko Stübner
1
-0
/
+9
2014-07-13
clk: rockchip: add reset controller
Heiko Stübner
1
-0
/
+14
2014-07-13
clk: rockchip: add clock type for pll clocks and pll used on rk3066
Heiko Stübner
1
-0
/
+74
2014-07-13
clk: rockchip: add basic infrastructure for clock branches
Heiko Stübner
1
-0
/
+250