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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
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fedora-vic-7100_5.10.6
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rt-linux-release
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starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
rockchip
/
clk-rk3368.c
Age
Commit message (
Expand
)
Author
Files
Lines
2017-10-14
clk: rockchip: export clock pclk_efuse_256 for RK3368 SoCs
Romain Perier
1
-1
/
+1
2017-06-02
clk: rockchip: mark some special clk as critical on rk3368
Elaine Zhang
1
-1
/
+4
2017-03-10
clk: rockchip: mark some rk3368 core-clks as critical
Elaine Zhang
1
-0
/
+3
2017-03-10
clk: rockchip: export SCLK_TIMERXX id for timers on rk3368
Elaine Zhang
1
-12
/
+12
2016-03-27
clk: rockchip: release io resource when failing to init clk
Shawn Lin
1
-0
/
+1
2016-03-27
clk: rockchip: Add support for multiple clock providers
Xing Zheng
1
-7
/
+14
2016-03-27
clk: rockchip: allow varying mux parameters for cpuclk pll-sources
Xing Zheng
1
-0
/
+6
2016-03-04
Merge tag 'v4.6-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/g...
Stephen Boyd
1
-37
/
+60
2016-02-26
clk: rockchip: include downstream muxes into fractional dividers on rk3368
Elaine Zhang
1
-37
/
+60
2016-02-15
Merge tag 'v4.6-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...
Michael Turquette
1
-49
/
+33
2016-02-04
clk: rockchip: convert manually created factor clocks to the new type
Heiko Stuebner
1
-22
/
+6
2016-01-25
clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for i2s_2ch
zhangqing
1
-1
/
+1
2016-01-25
clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for spdif_8ch
zhangqing
1
-1
/
+1
2016-01-25
clk: rockchip: rk3368: fix edp_24m parent
zhangqing
1
-1
/
+1
2016-01-25
clk: rockchip: rk3368: fix hdmi_cec gate-register
Heiko Stuebner
1
-1
/
+1
2016-01-25
clk: rockchip: rk3368: fix parents of video encoder/decoder
Heiko Stuebner
1
-2
/
+2
2016-01-25
clk: rockchip: rk3368: fix cpuclk core dividers
Heiko Stuebner
1
-20
/
+20
2016-01-25
clk: rockchip: rk3368: fix cpuclk mux bit of big cpu-cluster
Heiko Stuebner
1
-1
/
+1
2016-01-16
clk: rockchip: rk3368: fix some clock gates
Jianqun xu
1
-13
/
+13
2015-12-21
clk: rockchip: only enter pll slow-mode directly before reboots on rk3288
Heiko Stuebner
1
-1
/
+1
2015-12-03
clk: rockchip: fix rk3368 cpuclk divider offsets
Heiko Stuebner
1
-2
/
+2
2015-12-03
clk: rockchip: protect rk3368 aclk_bus and aclk_peri clocks
Jianqun xu
1
-0
/
+2
2015-12-02
clk: rockchip: Force rk3368 PWM clock (and its parents) on
Caesar Wang
1
-0
/
+5
2015-09-14
clk: rockchip: add critical clock for rk3368
Heiko Stübner
1
-0
/
+6
2015-07-07
clk: rockchip: add rk3368 clock controller
Heiko Stuebner
1
-0
/
+881