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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
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openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
renesas
/
r8a779a0-cpg-mssr.c
Age
Commit message (
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)
Author
Files
Lines
2021-05-11
clk: renesas: r8a779a0: Add ISPCS clocks
Niklas Söderlund
1
-0
/
+4
2021-03-12
clk: renesas: r8a779a0: Add CMT clocks
Wolfram Sang
1
-0
/
+4
2021-03-10
clk: renesas: r8a779a0: Add TSC clock
Niklas Söderlund
1
-0
/
+1
2021-03-10
clk: renesas: r8a779a0: Add TMU clocks
Wolfram Sang
1
-0
/
+6
2021-01-25
clk: renesas: r8a779a0: Add RAVB clocks
Wolfram Sang
1
-0
/
+6
2021-01-25
clk: renesas: r8a779a0: Add I2C clocks
Wolfram Sang
1
-0
/
+7
2021-01-12
clk: renesas: r8a779a0: Add SYS-DMAC clocks
Geert Uytterhoeven
1
-0
/
+2
2021-01-12
clk: renesas: r8a779a0: Add SDHI support
Wolfram Sang
1
-2
/
+15
2021-01-12
clk: renesas: r8a779a0: Add MSIOF clocks
Geert Uytterhoeven
1
-0
/
+6
2021-01-12
clk: renesas: r8a779a0: Add PFC/GPIO clocks
Geert Uytterhoeven
1
-0
/
+5
2021-01-07
clk: renesas: r8a779a0: Fix parent of CBFUSA clock
Geert Uytterhoeven
1
-1
/
+1
2021-01-07
clk: renesas: r8a779a0: Remove non-existent S2 clock
Geert Uytterhoeven
1
-1
/
+0
2021-01-07
clk: renesas: r8a779a0: Add HSCIF support
Wolfram Sang
1
-0
/
+4
2020-12-28
clk: renesas: r8a779a0: Add RWDT clocks
Wolfram Sang
1
-0
/
+9
2020-12-28
clk: renesas: r8a779a0: Add VSPX clock support
Kieran Bingham
1
-0
/
+4
2020-12-28
clk: renesas: r8a779a0: Add VSPD clock support
Kieran Bingham
1
-0
/
+2
2020-12-28
clk: renesas: r8a779a0: Add FCPVD clock support
Kieran Bingham
1
-0
/
+2
2020-12-10
clk: renesas: r8a779a0: Fix R and OSC clocks
Geert Uytterhoeven
1
-3
/
+10
2020-12-10
clk: renesas: r8a779a0: Add VIN clocks
Jacopo Mondi
1
-0
/
+32
2020-12-10
clk: renesas: r8a779a0: Add CSI4[0-3] clocks
Jacopo Mondi
1
-0
/
+4
2020-12-10
clk: renesas: r8a779a0: Make rcar_r8a779a0_cpg_clk_register() static
Geert Uytterhoeven
1
-1
/
+1
2020-09-17
clk: renesas: cpg-mssr: Add support for R-Car V3U
Yoshihiro Shimoda
1
-0
/
+276