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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
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openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
renesas
/
r8a77995-cpg-mssr.c
Age
Commit message (
Expand
)
Author
Files
Lines
2020-12-28
clk: renesas: r8a77995: Add TMU clocks
Niklas Söderlund
1
-0
/
+5
2020-06-22
clk: renesas: rcar-gen3: Mark RWDT clocks as critical
Ulrich Hecht
1
-1
/
+1
2020-02-10
clk: renesas: rcar-gen3: Add CCREE clocks
Geert Uytterhoeven
1
-0
/
+2
2019-06-18
clk: renesas: r8a77995: Add CMM clocks
Jacopo Mondi
1
-0
/
+2
2019-04-02
clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC
Takeshi Kihara
1
-1
/
+1
2018-12-04
clk: renesas: r8a77995: Simplify PLL3 multiplier/divider
Geert Uytterhoeven
1
-2
/
+2
2018-12-04
clk: renesas: r8a77995: Add missing CPEX clock
Geert Uytterhoeven
1
-1
/
+2
2018-12-04
clk: renesas: r8a77995: Remove non-existent SSP clocks
Geert Uytterhoeven
1
-1
/
+0
2018-12-04
clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks
Geert Uytterhoeven
1
-3
/
+0
2018-12-04
clk: renesas: r8a77995: Correct parent clock of DU
Geert Uytterhoeven
1
-2
/
+2
2018-10-19
Merge branch 'clk-renesas' into clk-next
Stephen Boyd
1
-2
/
+10
2018-08-31
clk: renesas: use SPDX identifier for Renesas drivers
Wolfram Sang
1
-4
/
+1
2018-08-27
clk: renesas: r8a77995: Correct RCLK handling
Geert Uytterhoeven
1
-2
/
+10
2017-10-16
clk: renesas: r8a77995: Correct parent clock of INTC-AP
Geert Uytterhoeven
1
-1
/
+1
2017-08-16
clk: renesas: cpg-mssr: Add R8A77995 support
Geert Uytterhoeven
1
-0
/
+236