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:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
renesas
/
r8a7795-cpg-mssr.c
Age
Commit message (
Expand
)
Author
Files
Lines
2016-09-14
Merge tag 'clk-renesas-for-v4.9-tag3' of git://git.kernel.org/pub/scm/linux/k...
Stephen Boyd
1
-0
/
+4
2016-09-12
clk: renesas: r8a7795: Add CMT clocks
Bui Duc Phuc
1
-0
/
+4
2016-08-12
clk: renesas: r8a7795: Fix SD clocks
Yoshihiro Shimoda
1
-4
/
+5
2016-06-21
clk: renesas: r8a7795: Add THS/TSC clock
Khiem Nguyen
1
-0
/
+1
2016-06-21
clk: renesas: r8a7795: Add DRIF clock
Ramesh Shanmugasundaram
1
-0
/
+8
2016-06-21
clk: renesas: r8a7795: Correct lvds clock parent
Geert Uytterhoeven
1
-1
/
+1
2016-06-21
clk: renesas: r8a7795: Provide FDP1 clocks
Kieran Bingham
1
-0
/
+3
2016-06-06
clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code
Geert Uytterhoeven
1
-355
/
+5
2016-04-26
clk: renesas: r8a7795: Add VIN clocks
Niklas Söderlund
1
-0
/
+8
2016-04-26
clk: renesas: r8a7795: Add CSI2 clocks
Niklas Söderlund
1
-0
/
+5
2016-04-06
clk: renesas: r8a7795: add RWDT clock
Wolfram Sang
1
-0
/
+1
2016-04-06
clk: renesas: r8a7795: add R clk
Wolfram Sang
1
-0
/
+16
2016-04-06
clk: renesas: r8a7795: add OSC and RINT clocks
Wolfram Sang
1
-0
/
+5
2016-03-29
clk: renesas: r8a7795: make SD clk definition specific for GEN3
Wolfram Sang
1
-4
/
+7
2016-03-29
clk: renesas: r8a7795: add PWM clock
Ulrich Hecht
1
-0
/
+1
2016-03-03
clk: renesas: move drivers to renesas directory
Simon Horman
1
-0
/
+638