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path: root/drivers/clk/microchip
AgeCommit message (Expand)AuthorFilesLines
2022-04-23clk: microchip: mpfs: add RTCREF clock controlConor Dooley1-1/+23
2022-04-23clk: microchip: mpfs: re-parent the configurable clocksConor Dooley1-19/+132
2022-04-23clk: microchip: mpfs: mark CLK_ATHENA as criticalConor Dooley1-3/+5
2022-04-23clk: microchip: mpfs: fix parents for FIC clocksConor Dooley1-5/+5
2022-04-22clk: microchip: mpfs: don't reset disabled peripheralsConor Dooley1-4/+0
2022-03-12clk: microchip: Add driver for Microchip PolarFire SoCDaire McNamara3-0/+392
2019-12-24clk: let init callback return an error codeJerome Brunet1-2/+6
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 445Thomas Gleixner3-27/+3
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner1-0/+1
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd2-0/+2
2016-08-25clk: microchip: Initialize SOSC clock rate for PIC32MZDA.Purna Chandra Mandal1-0/+1
2016-08-25clk: microchip: use readl_poll_timeout() in pbclk_set_rate().Purna Chandra Mandal1-3/+3
2016-06-02clk: microchip: Remove CLK_IS_ROOTStephen Boyd1-5/+5
2016-05-13CLK: microchip: Add Microchip PIC32 clock driver.Purna Chandra Mandal4-0/+1392