index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
microchip
Age
Commit message (
Expand
)
Author
Files
Lines
2022-12-09
clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE
Conor Dooley
1
-1
/
+2
2022-11-24
clk: microchip: check for null return of devm_kzalloc()
Hui Tang
1
-0
/
+6
2022-09-14
clk: microchip: add PolarFire SoC fabric clock support
Conor Dooley
2
-0
/
+291
2022-09-14
clk: microchip: mpfs: update module authorship & licencing
Conor Dooley
1
-3
/
+7
2022-09-14
clk: microchip: mpfs: convert periph_clk to clk_gate
Conor Dooley
1
-66
/
+6
2022-09-14
clk: microchip: mpfs: convert cfg_clk to clk_divider
Conor Dooley
1
-68
/
+8
2022-09-14
clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo()
Conor Dooley
1
-27
/
+6
2022-09-14
clk: microchip: mpfs: simplify control reg access
Conor Dooley
1
-25
/
+17
2022-09-14
clk: microchip: mpfs: move id & offset out of clock structs
Conor Dooley
1
-15
/
+15
2022-09-14
clk: microchip: mpfs: add MSS pll's set & round rate
Conor Dooley
1
-0
/
+54
2022-09-14
clk: microchip: mpfs: add reset controller
Conor Dooley
2
-12
/
+99
2022-09-14
clk: microchip: mpfs: make the rtc's ahb clock critical
Conor Dooley
1
-1
/
+3
2022-09-14
clk: microchip: mpfs: fix clk_cfg array bounds violation
Conor Dooley
1
-1
/
+6
2022-04-23
clk: microchip: mpfs: add RTCREF clock control
Conor Dooley
1
-1
/
+23
2022-04-23
clk: microchip: mpfs: re-parent the configurable clocks
Conor Dooley
1
-19
/
+132
2022-04-23
clk: microchip: mpfs: mark CLK_ATHENA as critical
Conor Dooley
1
-3
/
+5
2022-04-23
clk: microchip: mpfs: fix parents for FIC clocks
Conor Dooley
1
-5
/
+5
2022-04-22
clk: microchip: mpfs: don't reset disabled peripherals
Conor Dooley
1
-4
/
+0
2022-03-12
clk: microchip: Add driver for Microchip PolarFire SoC
Daire McNamara
3
-0
/
+392
2019-12-24
clk: let init callback return an error code
Jerome Brunet
1
-2
/
+6
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 445
Thomas Gleixner
3
-27
/
+3
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
1
-0
/
+1
2019-05-15
clk: Remove io.h from clk-provider.h
Stephen Boyd
2
-0
/
+2
2016-08-25
clk: microchip: Initialize SOSC clock rate for PIC32MZDA.
Purna Chandra Mandal
1
-0
/
+1
2016-08-25
clk: microchip: use readl_poll_timeout() in pbclk_set_rate().
Purna Chandra Mandal
1
-3
/
+3
2016-06-02
clk: microchip: Remove CLK_IS_ROOT
Stephen Boyd
1
-5
/
+5
2016-05-13
CLK: microchip: Add Microchip PIC32 clock driver.
Purna Chandra Mandal
4
-0
/
+1392