starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2018-12-15	Merge branch 'clk-fixes' into clk-next	Stephen Boyd	2	-0/+25
2018-12-13	Merge tag 'meson-clk-4.21-2' of https://github.com/BayLibre/clk-meson into cl...	Stephen Boyd	7	-71/+870
2018-12-11	clk: meson: axg-audio: use the clk input helper function	Jerome Brunet	1	-59/+24
2018-12-05	clk: meson: add clk-input helper function	Jerome Brunet	3	-0/+50
2018-12-04	clk: meson: Mark some things static	Stephen Boyd	2	-6/+6
2018-12-03	clk: meson: meson8b: add the read-only video clock trees	Martin Blumenstingl	2	-10/+782
2018-12-03	clk: meson: meson8b: add the fractional divider for vid_pll_dco	Martin Blumenstingl	2	-0/+6
2018-12-03	clk: meson: meson8b: fix the offset of vid_pll_dco's N value	Martin Blumenstingl	1	-1/+1
2018-11-27	clk: meson: Fix GXL HDMI PLL fractional bits width	Neil Armstrong	1	-1/+7
2018-11-23	clk: meson: meson8b: add the CPU clock post divider clocks	Martin Blumenstingl	2	-1/+256
2018-11-23	clk: meson: meson8b: rename cpu_div2/cpu_div3 to cpu_in_div2/cpu_in_div3	Martin Blumenstingl	2	-12/+12
2018-11-23	clk: meson: clk-regmap: add read-only gate ops	Martin Blumenstingl	2	-0/+6
2018-11-23	clk: meson: meson8b: allow changing the CPU clock tree	Martin Blumenstingl	1	-6/+6
2018-11-23	clk: meson: meson8b: run from the XTAL when changing the CPU frequency	Martin Blumenstingl	1	-0/+63
2018-11-23	clk: meson: meson8b: add support for more M/N values in sys_pll	Martin Blumenstingl	1	-0/+5
2018-11-23	clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL	Martin Blumenstingl	1	-1/+2
2018-11-23	clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel	Martin Blumenstingl	1	-2/+9
2018-11-23	clk: meson: clk-pll: check if the clock is already enabled	Martin Blumenstingl	1	-0/+19
2018-11-23	clk: meson: meson8b: fix the width of the cpu_scale_div clock	Martin Blumenstingl	1	-1/+1
2018-11-23	clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_table	Martin Blumenstingl	1	-7/+8
2018-11-23	clk: meson: meson8b: use the HHI syscon if available	Martin Blumenstingl	1	-9/+15
2018-11-23	clk: meson-gxbb: Add video clocks	Neil Armstrong	1	-0/+722
2018-11-23	dt-bindings: clk: meson-gxbb: Add Video clock bindings	Neil Armstrong	1	-2/+24
2018-11-23	clk: meson-gxbb: Fix HDMI PLL for GXL SoCs	Neil Armstrong	1	-2/+49
2018-11-23	clk: meson: Add vid_pll divider driver	Neil Armstrong	3	-1/+98
2018-11-08	clk: meson: axg: mark fdiv2 and fdiv3 as critical	Jerome Brunet	1	-0/+13
2018-11-08	clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL	Christian Hewitt	1	-0/+12
2018-09-26	clk: meson: meson8b: use the regmap in the internal reset controller	Martin Blumenstingl	1	-7/+6
2018-09-26	clk: meson: meson8b: register the clock controller early	Martin Blumenstingl	1	-60/+34
2018-09-26	clk: meson-axg: pcie: drop the mpll3 clock parent	Yixun Lan	1	-2/+4
2018-09-26	clk: meson: axg: round audio system master clocks down	Jerome Brunet	1	-11/+23
2018-09-26	clk: meson: clk-pll: drop hard-coded rates from pll tables	Jerome Brunet	5	-142/+162
2018-09-26	clk: meson: clk-pll: remove od parameters	Jerome Brunet	8	-498/+493
2018-09-26	clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary	Jerome Brunet	3	-8/+8
2018-09-26	clk: meson: clk-pll: add enable bit	Jerome Brunet	5	-10/+113
2018-07-09	clk: meson: add gen_clk	Jerome Brunet	4	-3/+135
2018-07-09	clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition	Jerome Brunet	1	-1/+0
2018-07-09	clk: meson-axg: add clocks required by pcie driver	Yixun Lan	2	-1/+150
2018-07-09	clk: meson: remove unused clk-audio-divider driver	Jerome Brunet	3	-119/+1
2018-07-09	clk: meson: stop rate propagation for audio clocks	Jerome Brunet	1	-9/+7
2018-07-09	clk: meson: axg: add the audio clock controller driver	Jerome Brunet	4	-0/+982
2018-07-09	clk: meson: add axg audio sclk divider driver	Jerome Brunet	3	-1/+252
2018-07-09	clk: meson: add triple phase clock driver	Jerome Brunet	4	-0/+94
2018-07-09	clk: meson: add clk-phase clock driver	Jerome Brunet	3	-0/+72
2018-07-09	clk: meson: clean-up meson clock configuration	Jerome Brunet	1	-9/+5
2018-07-09	clk: meson: remove obsolete register access	Jerome Brunet	2	-69/+4
2018-06-21	clk: meson: audio-divider is one based	Jerome Brunet	1	-1/+1
2018-06-19	clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL	Neil Armstrong	1	-0/+1
2018-06-09	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	20	-309/+586
2018-05-21	clk: meson: axg: let mpll clocks round closest	Jerome Brunet	1	-0/+4