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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
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openwrt-6.1.y
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rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
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visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
meson
/
gxbb.c
Age
Commit message (
Expand
)
Author
Files
Lines
2017-12-14
clk: meson: make the spinlock naming more specific
Yixun Lan
1
-56
/
+56
2017-12-08
clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocks
Jerome Brunet
1
-13
/
+3
2017-11-27
clk: meson: gxbb: fix wrong clock for SARADC/SANA
Yixun Lan
1
-2
/
+2
2017-10-20
clk: meson: gxbb: Add VPU and VAPB clocks data
Neil Armstrong
1
-0
/
+292
2017-08-24
Merge tag 'meson-clk-for-4.14' of git://github.com/baylibre/clk-meson into cl...
Stephen Boyd
1
-4
/
+185
2017-08-04
clk: meson: gxbb: Add sd_emmc clk0 clocks
Jerome Brunet
1
-0
/
+177
2017-08-04
clk: meson: gxbb: fix clk_mclk_i958 divider flags
Jerome Brunet
1
-3
/
+4
2017-08-04
clk: meson: gxbb: fix meson cts_amclk divider flags
Jerome Brunet
1
-1
/
+2
2017-08-04
clk: meson: gxbb: fix protection against undefined clks
Jerome Brunet
1
-0
/
+2
2017-08-01
clk: meson: mpll: fix mpll0 fractional part ignored
Jerome Brunet
1
-0
/
+5
2017-06-17
Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into ...
Stephen Boyd
1
-5
/
+8
2017-06-16
clk: meson: gxbb: add all clk81 parents
Jerome Brunet
1
-5
/
+8
2017-06-02
clk: meson-gxbb: Add const to some parent name arrays
Stephen Boyd
1
-3
/
+3
2017-05-29
clk: meson-gxbb: Add EE 32K Clock for CEC
Neil Armstrong
1
-0
/
+54
2017-05-29
clk: gxbb: remove CLK_IGNORE_UNUSED from clk81
Jerome Brunet
1
-1
/
+1
2017-05-29
clk: meson: gxbb: remove the "cpu_clk" from the GXBB and GXL driver
Martin Blumenstingl
1
-61
/
+3
2017-04-07
clk: meson: gxbb: add cts_i958 clock
Jerome Brunet
1
-0
/
+21
2017-04-07
clk: meson: gxbb: add cts_mclk_i958
Jerome Brunet
1
-0
/
+52
2017-04-07
clk: meson: gxbb: add cts_amclk
Jerome Brunet
1
-0
/
+67
2017-04-07
clk: meson: gxbb: protect against holes in the onecell_data array
Jerome Brunet
1
-0
/
+4
2017-04-04
clk: meson-gxbb: Add GXL/GXM GP0 Variant
Neil Armstrong
1
-28
/
+273
2017-04-04
clk: meson-gxbb: Add GP0 PLL init parameters
Neil Armstrong
1
-0
/
+13
2017-04-04
clk: meson-gxbb: Add MALI clocks
Neil Armstrong
1
-0
/
+139
2017-03-27
clk: meson: gxbb: mpll: use rw operation
Jerome Brunet
1
-3
/
+3
2017-03-27
clk: meson: mpll: add rw operation
Jerome Brunet
1
-0
/
+30
2017-03-27
clk: gxbb: put dividers and muxes in tables
Jerome Brunet
1
-8
/
+20
2017-03-27
clk: meson: add missing const qualifiers on gate arrays
Jerome Brunet
1
-1
/
+1
2017-01-23
clk: gxbb: add the SAR ADC clocks and expose them
Martin Blumenstingl
1
-0
/
+48
2016-09-03
Merge branch 'clk-meson-gxbb' into clk-next
Michael Turquette
1
-84
/
+84
2016-09-02
gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
Alexander Müller
1
-84
/
+84
2016-08-16
Merge branch 'clk-meson-gxbb' into clk-next
Stephen Boyd
1
-0
/
+9
2016-08-16
clk: gxbb: add MMC gate clocks, and expose for DT
Kevin Hilman
1
-0
/
+9
2016-08-16
clk: gxbb: use builtin_platform_driver to simplify the code
Wei Yongjun
1
-5
/
+1
2016-07-07
clk: meson: make gxbb explicitly non-modular
Paul Gortmaker
1
-14
/
+4
2016-06-23
clk: gxbb: add AmLogic GXBB clk controller driver
Michael Turquette
1
-0
/
+954