index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
clk
/
meson
/
clkc.h
Age
Commit message (
Expand
)
Author
Files
Lines
2017-04-07
clk: meson: add audio clock divider support
Jerome Brunet
1
-0
/
+10
2017-04-04
clk: meson: Add support for parameters for specific PLLs
Neil Armstrong
1
-0
/
+23
2017-03-27
clk: meson: mpll: add rw operation
Jerome Brunet
1
-1
/
+3
2017-03-27
clk: meson: fix SET_PARM macro
Jerome Brunet
1
-1
/
+1
2016-09-02
gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
Alexander Müller
1
-1
/
+1
2016-06-23
clk: meson: fractional pll support
Michael Turquette
1
-0
/
+15
2016-06-23
clk: meson: add mpll support
Michael Turquette
1
-0
/
+10
2016-06-23
clk: meson: add peripheral gate macro
Michael Turquette
1
-0
/
+14
2016-06-23
clk: meson8b: clean up composite clocks
Michael Turquette
1
-56
/
+0
2016-06-23
clk: meson8b: clean up cpu clocks
Michael Turquette
1
-14
/
+11
2016-06-23
clk: meson8b: clean up fixed factor clocks
Michael Turquette
1
-19
/
+0
2016-06-23
clk: meson8b: clean up pll clocks
Michael Turquette
1
-27
/
+25
2016-06-23
clk: meson8b: clean up fixed rate clocks
Michael Turquette
1
-26
/
+0
2015-06-06
clk: meson: Add support for Meson clock controller
Carlo Caione
1
-0
/
+187