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path: root/drivers/clk/mediatek
AgeCommit message (Expand)AuthorFilesLines
2021-02-09clk: mediatek: mux: Update parent at enable timeLaurent Pinchart2-3/+30
2021-02-09clk: mediatek: mux: Drop unused clock opsLaurent Pinchart2-70/+4
2021-02-09clk: mediatek: Select all the MT8183 clocks by defaultEnric Balletbo i Serra1-0/+11
2020-12-17clk: mediatek: Make mtk_clk_register_mux() a static functionWeiyi Lu2-5/+1
2020-10-20Merge branches 'clk-simplify', 'clk-ti', 'clk-tegra', 'clk-rockchip' and 'clk...Stephen Boyd12-14/+1511
2020-10-14clk: mediatek: Add MT8167 clock supportFabien Parent8-0/+1505
2020-10-09clk: mediatek: add UART0 clock supportHanks Chen1-0/+2
2020-09-22clk: mediatek: fix platform_no_drv_owner.cocci warningsZou Wei1-1/+0
2020-09-22clk: mediatek: mt7629: simplify the return expression of mtk_infrasys_initLiu Shixin1-7/+2
2020-09-22clk: mediatek: mt6797: simplify the return expression of mtk_infrasys_initLiu Shixin1-6/+2
2020-06-13treewide: replace '---help---' in Kconfig files with 'help'Masahiro Yamada1-32/+32
2020-06-10Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds10-1/+1494
2020-06-10clk: mediatek: Remove ifr{0,1}_cfg_regs structuresStephen Boyd1-30/+0
2020-05-29clk: mediatek: assign the initial value to clk_init_data of mtk_muxWeiyi Lu1-1/+1
2020-05-29clk: mediatek: Add MT6765 clock supportOwen Chen9-0/+1523
2020-05-20clk/soc: mediatek: mt6779: Bind clock driver from platform deviceMatthias Brugger1-7/+2
2020-05-20clk/soc: mediatek: mt6797: Bind clock driver from platform deviceMatthias Brugger1-7/+2
2020-05-20clk/soc: mediatek: mt8183: Bind clock driver from platform deviceMatthias Brugger1-7/+2
2020-05-20clk / soc: mediatek: Bind clock and gpu driver for mt2701Enric Balletbo i Serra1-7/+2
2020-05-20clk / soc: mediatek: Bind clock and gpu driver for mt2712Enric Balletbo i Serra1-7/+2
2020-04-13clk / soc: mediatek: Move mt8173 MMSYS to platform driverMatthias Brugger4-104/+154
2020-01-05clk: Fix Kconfig indentationKrzysztof Kozlowski1-22/+22
2019-10-17clk: mediatek: mt6797: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-2/+1
2019-10-17clk: mediatek: mt7629: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-4/+2
2019-10-17clk: mediatek: mt7622: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-4/+2
2019-10-17clk: mediatek: mt8183: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-4/+2
2019-10-17clk: mediatek: mt6779: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-2/+1
2019-10-17clk: mediatek: mt2712: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-4/+2
2019-09-21Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds18-11/+2102
2019-09-17clk: mediatek: Runtime PM support for MT8183 mcucfg clock providerWeiyi Lu1-2/+5
2019-09-17clk: mediatek: Register clock gate with deviceWeiyi Lu4-6/+23
2019-09-17clk: mediatek: add pericfg clocks for MT8183Chunfeng Yun1-0/+30
2019-09-09clk: mediatek: Add MT6779 clock supportmtk0176111-0/+1974
2019-08-08clk: reset: Modify reset-controller driveryong.liang3-4/+71
2019-07-23clk: mediatek: mt8183: Register 13MHz clock earlier for clocksourceWeiyi Lu1-12/+34
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds5-24/+72
2019-07-12Merge branches 'clk-debugfs', 'clk-unused', 'clk-refactor' and 'clk-qoriq' in...Stephen Boyd1-5/+0
2019-06-07clk: mediatek: mt8516: Remove unused variablePhilippe Mazenauer1-5/+0
2019-06-07clk: mediatek: Remove MT8183 unused clockErin Lo1-19/+0
2019-06-07clk: mediatek: add audsys clock driver for MT8516Fabien Parent3-0/+72
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner35-315/+35
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner1-0/+1
2019-05-07Merge branches 'clk-renesas', 'clk-qcom', 'clk-mtk', 'clk-milbeaut' and 'clk-...Stephen Boyd20-33/+3392
2019-04-26clk: mediatek: add clock driver for MT8516Fabien Parent3-0/+824
2019-04-12clk: mediatek: fix clk-gate flag settingWeiyi Lu1-2/+1
2019-04-11clk: mediatek: Allow changing PLL rate when it is offJames Liao1-11/+2
2019-04-11clk: mediatek: Add MT8183 clock supportWeiyi Lu15-0/+2196
2019-04-11clk: mediatek: Add configurable pcw_chg_reg to mtk_pll_dataWeiyi Lu2-6/+12
2019-04-11clk: mediatek: Add configurable pcwibits and fmin to mtk_pll_dataOwen Chen2-4/+13
2019-04-11clk: mediatek: Add new clkmux register APIOwen Chen3-1/+314