| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2015-07-28 | clk: mediatek: Fix calculation of PLL rate settings | James Liao | 1 | -2/+2 |
| 2015-07-28 | clk: mediatek: Fix PLL registers setting flow | James Liao | 1 | -9/+12 |
| 2015-07-20 | clk: mediatek: Properly include clk.h | Stephen Boyd | 4 | -2/+6 |
| 2015-07-07 | clk: mediatek: mt8173: Fix enabling of critical clocks | Sascha Hauer | 1 | -5/+21 |
| 2015-06-05 | clk: mediatek: Fix apmixedsys clock registration | James Liao | 2 | -2/+2 |
| 2015-05-20 | clk: mediatek: Initialize clk_init_data | Ricky Liang | 2 | -2/+2 |
| 2015-05-06 | clk: mediatek: Add basic clocks for Mediatek MT8173. | James Liao | 2 | -0/+831 |
| 2015-05-06 | clk: mediatek: Add basic clocks for Mediatek MT8135. | James Liao | 2 | -0/+645 |
| 2015-05-06 | clk: mediatek: Add reset controller support | Sascha Hauer | 3 | -0/+108 |
| 2015-05-06 | clk: mediatek: Add initial common clock support for Mediatek SoCs. | James Liao | 6 | -0/+898 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |