starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2022-11-29	clk: mediatek: mt8183: Drop flags for sys/univpll fixed factors	AngeloGioacchino Del Regno	1	-38/+38
2022-11-29	clk: mediatek: mt8183: Compress top_divs array entries	AngeloGioacchino Del Regno	1	-144/+72
2022-09-29	clk: mediatek: mt8183: Add clk mux notifier for MFG mux	Chen-Yu Tsai	1	-0/+28
2022-06-16	clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195	Rex-BC Chen	1	-6/+0
2022-06-16	clk: mediatek: reset: Add new register reset function with device	Rex-BC Chen	1	-1/+1
2022-06-16	clk: mediatek: reset: Support nonsequence base offsets of reset registers	Rex-BC Chen	1	-2/+12
2022-06-16	clk: mediatek: reset: Revise structure to control reset register	Rex-BC Chen	1	-2/+7
2022-06-16	clk: mediatek: reset: Merge and revise reset register function	Rex-BC Chen	1	-1/+2
2022-05-20	clk: mediatek: Replace 'struct clk' with 'struct clk_hw'	Chen-Yu Tsai	1	-12/+13
2022-05-19	clk: mediatek: use en_mask as a pure div_en_mask	Chun-Jie Chen	1	-11/+11
2022-02-17	clk: mediatek: pll: Split definitions into separate header file	Chen-Yu Tsai	1	-1/+2
2019-10-17	clk: mediatek: mt8183: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-4/+2
2019-09-21	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	1	-0/+44
2019-09-17	clk: mediatek: add pericfg clocks for MT8183	Chunfeng Yun	1	-0/+30
2019-08-08	clk: reset: Modify reset-controller driver	yong.liang	1	-1/+15
2019-07-23	clk: mediatek: mt8183: Register 13MHz clock earlier for clocksource	Weiyi Lu	1	-12/+34
2019-06-07	clk: mediatek: Remove MT8183 unused clock	Erin Lo	1	-19/+0
2019-04-11	clk: mediatek: Add MT8183 clock support	Weiyi Lu	1	-0/+1284