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path: root/drivers/clk/ingenic/jz4740-cgu.c
AgeCommit message (Expand)AuthorFilesLines
2021-06-28clk: Support bypassing dividersPaul Cercueil1-6/+6
2020-05-29clk: Ingenic: Adjust cgu code to make it compatible with X1830.周琰杰 (Zhou Yanjie)1-0/+4
2019-09-22Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds1-0/+6
2019-08-12clk: ingenic: Use CLK_OF_DECLARE_DRIVER macroPaul Cercueil1-1/+1
2019-08-09clk: jz4740: Add TCU clockPaul Cercueil1-0/+6
2019-08-08clk: ingenic/jz4740: Fix "pll half" divider not read/written properlyPaul Cercueil1-1/+8
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds1-78/+27
2019-06-26clk: ingenic: Remove unused functionsPaul Cercueil1-73/+0
2019-06-26clk: ingenic: Handle setting the Low-Power Mode bitPaul Cercueil1-0/+3
2019-06-07clk: ingenic/jz4740: Fix incorrect dividers for main clocksPaul Cercueil1-5/+24
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner1-10/+1
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd1-0/+1
2019-02-06clk: ingenic: jz4740: Fix gating of UDC clockPaul Cercueil1-1/+1
2018-07-06clk: ingenic: Add missing flag for UDC clockPaul Cercueil1-1/+1
2018-07-06clk: ingenic: Fix incorrect data for the i2s clockPaul Cercueil1-1/+1
2017-11-03Update MIPS email addressesPaul Burton1-1/+1
2016-05-13clk: ingenic: Allow divider value to be dividedHarvey Hunt1-12/+12
2015-06-21MIPS, clk: move jz4740 clock suspend, resume functions to jz4740-cguPaul Burton1-0/+37
2015-06-21MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cguPaul Burton1-0/+22
2015-06-21MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cguPaul Burton1-0/+22
2015-06-21MIPS,clk: migrate JZ4740 to common clock frameworkPaul Burton1-0/+222