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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
imx
Age
Commit message (
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)
Author
Files
Lines
2020-02-01
Merge branches 'clk-imx', 'clk-ti', 'clk-xilinx', 'clk-nvidia', 'clk-qcom', '...
Stephen Boyd
21
-1052
/
+1978
2020-01-12
clk: imx: Add support for i.MX8MP clock driver
Anson Huang
3
-0
/
+771
2020-01-12
clk: imx: gate4: Switch imx_clk_gate4_flags() to clk_hw based API
Anson Huang
1
-2
/
+5
2019-12-23
clk: imx: imx8mq: Switch to clk_hw based API
Peng Fan
1
-281
/
+292
2019-12-23
clk: imx: imx8mm: Switch to clk_hw based API
Peng Fan
1
-271
/
+284
2019-12-23
clk: imx: imx8mn: Switch to clk_hw based API
Peng Fan
1
-238
/
+251
2019-12-23
clk: imx: Remove __init for imx_obtain_fixed_clk_hw() API
Peng Fan
1
-2
/
+2
2019-12-23
clk: imx: gate3: Switch to clk_hw based API
Peng Fan
1
-2
/
+5
2019-12-23
clk: imx: add hw API imx_clk_hw_mux2_flags
Peng Fan
1
-0
/
+10
2019-12-23
clk: imx: add imx_unregister_hw_clocks
Peng Fan
2
-0
/
+9
2019-12-23
clk: imx: clk-composite-8m: Switch to clk_hw based API
Peng Fan
2
-9
/
+24
2019-12-23
clk: imx: clk-pll14xx: Switch to clk_hw based API
Peng Fan
2
-9
/
+20
2019-12-11
clk: imx7up: Rename the clks to hws
Abel Vesa
1
-91
/
+91
2019-12-11
clk: imx: Rename the imx_clk_divider_gate to imply it's clk_hw based
Abel Vesa
3
-6
/
+6
2019-12-11
clk: imx: Rename the imx_clk_pfdv2 to imply it's clk_hw based
Abel Vesa
3
-10
/
+10
2019-12-11
clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw based
Abel Vesa
3
-4
/
+4
2019-12-11
clk: imx: Rename sccg and frac pll register to suggest clk_hw
Abel Vesa
3
-7
/
+16
2019-12-11
clk: imx: imx7ulp composite: Rename to show is clk_hw based
Abel Vesa
3
-28
/
+28
2019-12-11
clk: imx: pllv2: Switch to clk_hw based API
Abel Vesa
2
-6
/
+13
2019-12-11
clk: imx: pllv1: Switch to clk_hw based API
Abel Vesa
2
-6
/
+13
2019-12-11
clk: imx: Replace all the clk based helpers with macros
Abel Vesa
1
-27
/
+12
2019-12-11
clk: imx: Rename the SCCG to SSCG
Abel Vesa
4
-81
/
+81
2019-12-11
clk: imx: Add correct failure handling for clk based helpers
Abel Vesa
1
-15
/
+22
2019-12-11
clk: imx8qxp-lpcg: Warn against devm_platform_ioremap_resource
Leonard Crestez
1
-0
/
+11
2019-12-11
clk: imx: pll14xx: fix clk_pll14xx_wait_lock
Peng Fan
1
-1
/
+1
2019-12-11
clk: imx8mn: correct the usb1_ctrl parent to be usb_bus
Li Jun
1
-1
/
+1
2019-12-09
clk: imx: clk-imx7ulp: Add missing sentinel of ulp_div_table
Peng Fan
1
-0
/
+1
2019-12-09
clk: imx8m: Suppress bind attrs
Leonard Crestez
3
-0
/
+15
2019-12-09
clk: imx7ulp: Fix watchdog2 clock name typo
Fabio Estevam
1
-1
/
+1
2019-12-09
clk: imx6q: disable non functional divider
Jan Remmet
1
-1
/
+4
2019-12-09
clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHE
Leonard Crestez
4
-2
/
+10
2019-12-09
clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocks
Leonard Crestez
3
-8
/
+23
2019-12-09
clk: imx: clk-composite-8m: add lock to gate/mux
Peng Fan
1
-0
/
+2
2019-12-09
clk: imx: clk-divider-gate: drop redundant initialization
Peng Fan
1
-4
/
+4
2019-12-09
clk: imx: clk-divider-gate: fix a typo in comment
Peng Fan
1
-1
/
+1
2019-12-02
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
10
-301
/
+208
2019-11-27
Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'c...
Stephen Boyd
10
-287
/
+208
2019-11-04
clk: imx: imx8mq: fix sys3_pll_out_sels
Peng Fan
1
-2
/
+2
2019-10-28
clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock
Fancy Fang
1
-2
/
+1
2019-10-28
clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARM
Leonard Crestez
2
-2
/
+2
2019-10-28
clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code
Peng Fan
1
-4
/
+4
2019-10-28
clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code
Peng Fan
1
-6
/
+6
2019-10-28
clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code
Peng Fan
1
-4
/
+4
2019-10-28
clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify code
Peng Fan
1
-2
/
+2
2019-10-26
clk: imx7ulp: Correct DDR clock mux options
Anson Huang
1
-2
/
+2
2019-10-26
clk: imx7ulp: Correct system clock source option #7
Anson Huang
1
-1
/
+1
2019-10-25
clk: imx: imx8mq: mark sys1/2_pll as fixed clock
Peng Fan
1
-6
/
+2
2019-10-25
clk: imx: imx8mn: mark sys_pll1/2 as fixed clock
Peng Fan
1
-26
/
+20
2019-10-25
clk: imx: imx8mm: mark sys_pll1/2 as fixed clock
Peng Fan
1
-26
/
+20
2019-10-25
clk: imx8mn: Define gates for pll1/2 fixed dividers
Leonard Crestez
1
-19
/
+38
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