index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
imx
/
clk.h
Age
Commit message (
Expand
)
Author
Files
Lines
2018-12-15
Merge branches 'clk-imx7ulp', 'clk-imx6-fixes', 'clk-imx-fixes', 'clk-imx8qxp...
Stephen Boyd
1
-7
/
+153
2018-12-03
clk: imx: implement new clk_hw based APIs
A.s. Dong
1
-0
/
+62
2018-12-03
clk: imx: make mux parent strings const
A.s. Dong
1
-7
/
+11
2018-12-03
clk: imx: add imx7ulp composite clk support
A.s. Dong
1
-0
/
+6
2018-12-03
clk: imx: add pfdv2 support
A.s. Dong
1
-0
/
+3
2018-12-03
clk: imx: add pllv4 support
A.s. Dong
1
-0
/
+3
2018-12-03
clk: imx: add gatable clock divider support
A.s. Dong
1
-0
/
+4
2018-12-03
clk: imx: Add SCCG PLL type
Lucas Stach
1
-0
/
+9
2018-12-03
clk: imx: Add fractional PLL output clock
Lucas Stach
1
-0
/
+3
2018-12-03
clk: imx: Add clock driver for i.MX8MQ CCM
Abel Vesa
1
-0
/
+36
2018-12-03
clk: imx: Add imx composite clock
Abel Vesa
1
-0
/
+16
2018-10-17
clk: imx: imx7d: remove clks_init_on array
Anson Huang
1
-0
/
+7
2018-04-06
clk: imx: add new gate/gate2 wrapper funtion
Bai Ping
1
-0
/
+14
2017-11-02
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Greg Kroah-Hartman
1
-0
/
+1
2017-06-01
clk: imx7d: Fix the powerdown bit location of PLL DDR
Fabio Estevam
1
-0
/
+1
2017-01-10
clk: imx: pllv3: support fractional multiplier on vf610 PLL1/PLL2
Nikita Yushchenko
1
-0
/
+1
2016-11-01
clk: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-only
Philipp Zabel
1
-0
/
+8
2016-08-19
clk: imx: Introduce clk_register_gate2()
Fabio Estevam
1
-0
/
+9
2016-07-02
clk: imx: add clk api for supporting CLK_OPS_PARENT_ENABLE clocks
Dong Aisheng
1
-0
/
+32
2016-07-02
clk: imx: re-order and concentrate the same type of clk api
Dong Aisheng
1
-29
/
+29
2016-03-31
clk: imx: clk-gate2: allow custom gate configuration
Stefan Agner
1
-3
/
+10
2016-03-03
clk: imx: Remove CLK_IS_ROOT
Stephen Boyd
1
-1
/
+1
2015-09-26
clk: imx: add common logic to detect early UART usage
Lucas Stach
1
-0
/
+1
2015-06-03
ARM: imx: define an enum for gpt timer device type
Shawn Guo
1
-7
/
+0
2015-06-03
ARM: clk: imx: update pllv3 to support imx7
Frank Li
1
-0
/
+1
2015-06-03
ARM: imx: move clock drivers into drivers/clk
Shawn Guo
1
-0
/
+155