starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159	Thomas Gleixner	1	-7/+1
2018-10-17	clk: imx6ul: add mmdc1 ipg clock	Anson Huang	1	-0/+1
2018-08-15	Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter',...	Stephen Boyd	1	-0/+1
2018-07-25	clk: imx6ul: fix missing of_node_put()	Nicholas Mc Guire	1	-0/+1
2018-06-29	clk: imx6ul: remove clks_init_on array	Anson Huang	1	-17/+6
2018-06-29	clk: imx6ul: add GPIO clock gates	Anson Huang	1	-0/+5
2018-06-09	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	1	-1/+19
2018-06-04	Merge branch 'clk-imx6ul' into clk-next	Stephen Boyd	1	-1/+1
2018-05-16	clk: imx6ull: use OSC clock during AXI rate change	Stefan Agner	1	-1/+1
2018-05-16	clk: imx: Add new clo01 and clo2 controlled by CCOSR	Michael Trimarchi	1	-0/+18
2018-05-05	clk: imx6ul: fix periph clk2 clock mux selection	Stefan Agner	1	-1/+1
2018-03-13	clk: imx6ull: Add epdc_podf instead of sim_podf	Leonard Crestez	1	-1/+4
2017-11-02	clk: imx: clk-imx6ul: allow lcdif_pre_sel to change parent rate	Philipp Zabel	1	-1/+1
2017-08-31	clk: imx: constify clk_div_table	Arvind Yadav	1	-3/+3
2017-04-12	clk: imx: correct uart4_serial clock name in driver for i.MX6UL	Robin van der Gracht	1	-1/+1
2017-04-12	clk: imx: clk-imx6ul: The i.mx6ul has no aips_tz3 clock	Robin van der Gracht	1	-4/+5
2016-11-15	clk: imx: clk-imx6ul: add clk support for imx6ull	Bai Ping	1	-11/+61
2016-06-16	clk: imx6ul: fix gpt2 clock names	Dong Aisheng	1	-2/+2
2016-06-12	clk: imx: fix pll clock parents	Dong Aisheng	1	-7/+7
2016-02-28	clk: imx: add kpp clock for i.MX6UL	Lothar Waßmann	1	-0/+1
2016-02-28	clk: imx: whitespace cleanup; no functional change	Lothar Waßmann	1	-31/+31
2016-02-18	clk: imx: correct pwm7 clock name in driver for i.MX6UL	Anatolij Gustschin	1	-1/+1
2015-12-02	clk: imx: Replace clk error check with imx_check_clocks()	Bai Ping	1	-3/+1
2015-09-17	clk: imx: increase AXI clock rate to 264MHz for i.MX6UL	Anson Huang	1	-0/+18
2015-07-14	clk: imx: add imx6ul clk tree support	Frank Li	1	-0/+432