starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2019-05-21	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 1	Thomas Gleixner	1	-15/+1
2018-03-12	clk: hisilicon: add hisi phase clock support	tianshuliang	1	-0/+19
2016-06-30	clk: hisilicon: add hisi_clk_unregister_* functions	Jiancheng Xue	1	-0/+21
2016-06-30	clk: hisilicon: add error processing for hisi_clk_register_* functions	Jiancheng Xue	1	-5/+5
2016-06-30	clk: hisilicon: add hisi_clk_alloc function.	Jiancheng Xue	1	-0/+3
2016-05-06	clk: hisilicon: export some hisilicon APIs to modules	Jiancheng Xue	1	-7/+7
2015-06-05	clk: make several parent names const	Uwe Kleine-König	1	-1/+1
2015-06-04	clk: hi6220: Clock driver support for Hisilicon hi6220 SoC	Bintian Wang	1	-0/+17
2015-06-03	clk: hisilicon: Remove __init for marking function prototypes	Bintian Wang	1	-11/+11
2014-05-12	clk: hisi: add hisi_clk_register_gate	Zhangfei Gao	1	-0/+2
2014-05-12	clk: hisi: use clk_register_mux_table in hisi_clk_register_mux	Zhangfei Gao	1	-0/+1
2014-03-19	clk: hisi: remove static variable	Haojian Zhuang	1	-6/+11
2013-12-04	clk: hisilicon: add common clock support	Haojian Zhuang	1	-0/+103